2011-10-04 18:19:01 +08:00
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/*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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2012-12-18 01:30:17 +08:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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2011-10-04 18:19:01 +08:00
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*/
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2012-10-03 01:01:07 +08:00
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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2011-10-04 18:19:01 +08:00
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2013-12-20 18:16:24 +08:00
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#include <linux/anon_inodes.h>
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2011-10-04 18:19:01 +08:00
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#include <drm/exynos_drm.h>
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#include "exynos_drm_drv.h"
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#include "exynos_drm_crtc.h"
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2012-02-15 10:25:19 +08:00
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#include "exynos_drm_encoder.h"
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2011-10-04 18:19:01 +08:00
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#include "exynos_drm_fbdev.h"
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#include "exynos_drm_fb.h"
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#include "exynos_drm_gem.h"
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2011-12-08 16:54:07 +08:00
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#include "exynos_drm_plane.h"
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2012-03-21 09:55:26 +08:00
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#include "exynos_drm_vidi.h"
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2012-04-23 20:01:28 +08:00
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#include "exynos_drm_dmabuf.h"
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2012-05-17 19:06:32 +08:00
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#include "exynos_drm_g2d.h"
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drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
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#include "exynos_drm_ipp.h"
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2012-10-20 22:53:42 +08:00
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#include "exynos_drm_iommu.h"
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2011-10-04 18:19:01 +08:00
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2011-12-15 16:31:24 +08:00
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#define DRIVER_NAME "exynos"
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2011-10-04 18:19:01 +08:00
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#define DRIVER_DESC "Samsung SoC DRM"
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#define DRIVER_DATE "20110530"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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2011-12-16 20:31:12 +08:00
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#define VBLANK_OFF_DELAY 50000
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2012-10-16 08:20:12 +08:00
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/* platform device pointer for eynos drm device. */
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static struct platform_device *exynos_drm_pdev;
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2011-10-04 18:19:01 +08:00
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static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
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{
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struct exynos_drm_private *private;
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int ret;
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int nr;
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private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL);
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2013-08-19 18:04:55 +08:00
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if (!private)
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2011-10-04 18:19:01 +08:00
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return -ENOMEM;
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INIT_LIST_HEAD(&private->pageflip_event_list);
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dev->dev_private = (void *)private;
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2012-10-20 22:53:42 +08:00
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/*
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* create mapping to manage iommu table and set a pointer to iommu
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* mapping structure to iommu_mapping of private data.
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* also this iommu_mapping can be used to check if iommu is supported
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* or not.
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*/
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ret = drm_create_iommu_mapping(dev);
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if (ret < 0) {
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DRM_ERROR("failed to create iommu mapping.\n");
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goto err_crtc;
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}
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2011-10-04 18:19:01 +08:00
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drm_mode_config_init(dev);
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2011-10-18 15:58:05 +08:00
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/* init kms poll for handling hpd */
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drm_kms_helper_poll_init(dev);
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2011-10-04 18:19:01 +08:00
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exynos_drm_mode_config_init(dev);
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/*
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* EXYNOS4 is enough to have two CRTCs and each crtc would be used
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* without dependency of hardware.
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*/
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for (nr = 0; nr < MAX_CRTC; nr++) {
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ret = exynos_drm_crtc_create(dev, nr);
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if (ret)
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2012-10-20 22:53:42 +08:00
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goto err_release_iommu_mapping;
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2011-10-04 18:19:01 +08:00
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}
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2011-12-08 16:54:07 +08:00
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for (nr = 0; nr < MAX_PLANE; nr++) {
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2012-06-27 13:27:04 +08:00
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struct drm_plane *plane;
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unsigned int possible_crtcs = (1 << MAX_CRTC) - 1;
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plane = exynos_plane_init(dev, possible_crtcs, false);
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if (!plane)
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2012-10-20 22:53:42 +08:00
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goto err_release_iommu_mapping;
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2011-12-08 16:54:07 +08:00
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}
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2011-10-04 18:19:01 +08:00
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ret = drm_vblank_init(dev, MAX_CRTC);
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if (ret)
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2012-10-20 22:53:42 +08:00
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goto err_release_iommu_mapping;
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2011-10-04 18:19:01 +08:00
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/*
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* probe sub drivers such as display controller and hdmi driver,
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* that were registered at probe() of platform driver
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* to the sub driver and create encoder and connector for them.
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*/
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ret = exynos_drm_device_register(dev);
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if (ret)
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goto err_vblank;
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2012-02-15 10:25:19 +08:00
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/* setup possible_clones. */
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exynos_drm_encoder_setup(dev);
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2011-10-04 18:19:01 +08:00
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/*
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* create and configure fb helper and also exynos specific
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* fbdev object.
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*/
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ret = exynos_drm_fbdev_init(dev);
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if (ret) {
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DRM_ERROR("failed to initialize drm fbdev\n");
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goto err_drm_device;
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}
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2011-12-16 20:31:12 +08:00
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drm_vblank_offdelay = VBLANK_OFF_DELAY;
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2013-12-11 18:34:23 +08:00
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platform_set_drvdata(dev->platformdev, dev);
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2011-10-04 18:19:01 +08:00
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return 0;
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err_drm_device:
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exynos_drm_device_unregister(dev);
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err_vblank:
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drm_vblank_cleanup(dev);
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2012-10-20 22:53:42 +08:00
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err_release_iommu_mapping:
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drm_release_iommu_mapping(dev);
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2011-10-04 18:19:01 +08:00
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err_crtc:
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drm_mode_config_cleanup(dev);
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kfree(private);
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return ret;
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}
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static int exynos_drm_unload(struct drm_device *dev)
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{
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exynos_drm_fbdev_fini(dev);
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exynos_drm_device_unregister(dev);
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drm_vblank_cleanup(dev);
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2011-10-18 15:58:05 +08:00
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drm_kms_helper_poll_fini(dev);
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2011-10-04 18:19:01 +08:00
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drm_mode_config_cleanup(dev);
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2012-10-20 22:53:42 +08:00
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drm_release_iommu_mapping(dev);
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2011-10-04 18:19:01 +08:00
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kfree(dev->dev_private);
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dev->dev_private = NULL;
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return 0;
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}
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2013-12-20 18:16:24 +08:00
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static const struct file_operations exynos_drm_gem_fops = {
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.mmap = exynos_drm_gem_mmap_buffer,
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};
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2012-03-16 17:47:09 +08:00
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static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
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{
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2012-05-17 19:06:32 +08:00
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struct drm_exynos_file_private *file_priv;
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2013-12-20 18:16:24 +08:00
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struct file *anon_filp;
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2013-07-01 16:00:47 +08:00
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int ret;
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2012-05-17 19:06:32 +08:00
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file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
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if (!file_priv)
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return -ENOMEM;
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file->driver_priv = file_priv;
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2012-04-23 20:01:28 +08:00
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2013-07-01 16:00:47 +08:00
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ret = exynos_drm_subdrv_open(dev, file);
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2014-01-16 14:01:26 +08:00
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if (ret)
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goto out;
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2013-07-01 16:00:47 +08:00
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2013-12-20 18:16:24 +08:00
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anon_filp = anon_inode_getfile("exynos_gem", &exynos_drm_gem_fops,
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NULL, 0);
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if (IS_ERR(anon_filp)) {
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2014-01-16 14:01:26 +08:00
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ret = PTR_ERR(anon_filp);
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goto out;
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2013-12-20 18:16:24 +08:00
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}
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anon_filp->f_mode = FMODE_READ | FMODE_WRITE;
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file_priv->anon_filp = anon_filp;
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2014-01-16 14:01:26 +08:00
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return ret;
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out:
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kfree(file_priv);
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file->driver_priv = NULL;
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2013-07-01 16:00:47 +08:00
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return ret;
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2012-03-16 17:47:09 +08:00
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}
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2011-10-14 12:29:51 +08:00
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static void exynos_drm_preclose(struct drm_device *dev,
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2012-02-15 10:25:18 +08:00
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struct drm_file *file)
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2013-10-01 13:51:37 +08:00
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{
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exynos_drm_subdrv_close(dev, file);
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}
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static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
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2011-10-14 12:29:51 +08:00
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{
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2012-03-16 17:47:07 +08:00
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struct exynos_drm_private *private = dev->dev_private;
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2013-12-20 18:16:24 +08:00
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struct drm_exynos_file_private *file_priv;
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2013-10-01 13:51:37 +08:00
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struct drm_pending_vblank_event *v, *vt;
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struct drm_pending_event *e, *et;
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2012-03-16 17:47:07 +08:00
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unsigned long flags;
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2013-10-01 13:51:37 +08:00
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if (!file->driver_priv)
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return;
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/* Release all events not unhandled by page flip handler. */
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2012-03-16 17:47:07 +08:00
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spin_lock_irqsave(&dev->event_lock, flags);
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2013-10-01 13:51:37 +08:00
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list_for_each_entry_safe(v, vt, &private->pageflip_event_list,
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2012-03-16 17:47:07 +08:00
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base.link) {
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2013-10-01 13:51:37 +08:00
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if (v->base.file_priv == file) {
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list_del(&v->base.link);
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drm_vblank_put(dev, v->pipe);
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v->base.destroy(&v->base);
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2012-03-16 17:47:07 +08:00
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}
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}
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2012-03-16 17:47:09 +08:00
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2013-10-01 13:51:37 +08:00
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/* Release all events handled by page flip handler but not freed. */
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list_for_each_entry_safe(e, et, &file->event_list, link) {
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list_del(&e->link);
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e->destroy(e);
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}
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spin_unlock_irqrestore(&dev->event_lock, flags);
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2011-10-14 12:29:51 +08:00
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2013-12-20 18:16:24 +08:00
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file_priv = file->driver_priv;
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if (file_priv->anon_filp)
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fput(file_priv->anon_filp);
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2012-02-15 10:25:22 +08:00
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kfree(file->driver_priv);
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file->driver_priv = NULL;
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}
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2011-10-04 18:19:01 +08:00
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static void exynos_drm_lastclose(struct drm_device *dev)
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{
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exynos_drm_fbdev_restore_mode(dev);
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}
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2012-05-17 19:27:22 +08:00
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static const struct vm_operations_struct exynos_drm_gem_vm_ops = {
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2011-10-04 18:19:01 +08:00
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.fault = exynos_drm_gem_fault,
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.open = drm_gem_vm_open,
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.close = drm_gem_vm_close,
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};
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2013-08-03 01:27:49 +08:00
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static const struct drm_ioctl_desc exynos_ioctls[] = {
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2011-10-04 18:19:01 +08:00
|
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DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl,
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DRM_UNLOCKED | DRM_AUTH),
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DRM_IOCTL_DEF_DRV(EXYNOS_GEM_MAP_OFFSET,
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exynos_drm_gem_map_offset_ioctl, DRM_UNLOCKED |
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DRM_AUTH),
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|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_GEM_MMAP,
|
|
|
|
|
exynos_drm_gem_mmap_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
2012-05-04 14:51:17 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET,
|
|
|
|
|
exynos_drm_gem_get_ioctl, DRM_UNLOCKED),
|
2012-03-21 09:55:26 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION,
|
|
|
|
|
vidi_connection_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
2012-05-17 19:06:32 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER,
|
|
|
|
|
exynos_g2d_get_ver_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST,
|
|
|
|
|
exynos_g2d_set_cmdlist_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC,
|
|
|
|
|
exynos_g2d_exec_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_GET_PROPERTY,
|
|
|
|
|
exynos_drm_ipp_get_property, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_SET_PROPERTY,
|
|
|
|
|
exynos_drm_ipp_set_property, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_QUEUE_BUF,
|
|
|
|
|
exynos_drm_ipp_queue_buf, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_CMD_CTRL,
|
|
|
|
|
exynos_drm_ipp_cmd_ctrl, DRM_UNLOCKED | DRM_AUTH),
|
2011-10-04 18:19:01 +08:00
|
|
|
};
|
|
|
|
|
|
2011-12-08 14:00:20 +08:00
|
|
|
static const struct file_operations exynos_drm_driver_fops = {
|
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
|
.open = drm_open,
|
|
|
|
|
.mmap = exynos_drm_gem_mmap,
|
|
|
|
|
.poll = drm_poll,
|
|
|
|
|
.read = drm_read,
|
|
|
|
|
.unlocked_ioctl = drm_ioctl,
|
2012-07-10 06:40:07 +08:00
|
|
|
#ifdef CONFIG_COMPAT
|
|
|
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
|
|
|
#endif
|
2011-12-08 14:00:20 +08:00
|
|
|
.release = drm_release,
|
|
|
|
|
};
|
|
|
|
|
|
2011-10-04 18:19:01 +08:00
|
|
|
static struct drm_driver exynos_drm_driver = {
|
2012-05-16 23:08:53 +08:00
|
|
|
.driver_features = DRIVER_HAVE_IRQ | DRIVER_MODESET |
|
|
|
|
|
DRIVER_GEM | DRIVER_PRIME,
|
2011-10-04 18:19:01 +08:00
|
|
|
.load = exynos_drm_load,
|
|
|
|
|
.unload = exynos_drm_unload,
|
2012-03-16 17:47:09 +08:00
|
|
|
.open = exynos_drm_open,
|
2011-10-14 12:29:51 +08:00
|
|
|
.preclose = exynos_drm_preclose,
|
2011-10-04 18:19:01 +08:00
|
|
|
.lastclose = exynos_drm_lastclose,
|
2012-02-15 10:25:22 +08:00
|
|
|
.postclose = exynos_drm_postclose,
|
2011-10-04 18:19:01 +08:00
|
|
|
.get_vblank_counter = drm_vblank_count,
|
|
|
|
|
.enable_vblank = exynos_drm_crtc_enable_vblank,
|
|
|
|
|
.disable_vblank = exynos_drm_crtc_disable_vblank,
|
|
|
|
|
.gem_free_object = exynos_drm_gem_free_object,
|
|
|
|
|
.gem_vm_ops = &exynos_drm_gem_vm_ops,
|
|
|
|
|
.dumb_create = exynos_drm_gem_dumb_create,
|
|
|
|
|
.dumb_map_offset = exynos_drm_gem_dumb_map_offset,
|
2013-07-16 15:12:04 +08:00
|
|
|
.dumb_destroy = drm_gem_dumb_destroy,
|
2012-04-23 20:01:28 +08:00
|
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
|
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
|
|
|
.gem_prime_export = exynos_dmabuf_prime_export,
|
|
|
|
|
.gem_prime_import = exynos_dmabuf_prime_import,
|
2011-10-04 18:19:01 +08:00
|
|
|
.ioctls = exynos_ioctls,
|
2013-08-03 01:27:49 +08:00
|
|
|
.num_ioctls = ARRAY_SIZE(exynos_ioctls),
|
2011-12-08 14:00:20 +08:00
|
|
|
.fops = &exynos_drm_driver_fops,
|
2011-10-04 18:19:01 +08:00
|
|
|
.name = DRIVER_NAME,
|
|
|
|
|
.desc = DRIVER_DESC,
|
|
|
|
|
.date = DRIVER_DATE,
|
|
|
|
|
.major = DRIVER_MAJOR,
|
|
|
|
|
.minor = DRIVER_MINOR,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int exynos_drm_platform_probe(struct platform_device *pdev)
|
|
|
|
|
{
|
2013-06-11 01:41:59 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
2011-10-04 18:19:01 +08:00
|
|
|
|
|
|
|
|
return drm_platform_init(&exynos_drm_driver, pdev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int exynos_drm_platform_remove(struct platform_device *pdev)
|
|
|
|
|
{
|
2013-12-11 18:34:23 +08:00
|
|
|
drm_put_dev(platform_get_drvdata(pdev));
|
2011-10-04 18:19:01 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct platform_driver exynos_drm_platform_driver = {
|
|
|
|
|
.probe = exynos_drm_platform_probe,
|
2012-12-22 07:09:25 +08:00
|
|
|
.remove = exynos_drm_platform_remove,
|
2011-10-04 18:19:01 +08:00
|
|
|
.driver = {
|
|
|
|
|
.owner = THIS_MODULE,
|
2012-03-05 19:02:30 +08:00
|
|
|
.name = "exynos-drm",
|
2011-10-04 18:19:01 +08:00
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int __init exynos_drm_init(void)
|
|
|
|
|
{
|
2012-03-16 17:47:08 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMD
|
|
|
|
|
ret = platform_driver_register(&fimd_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_fimd;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_DRM_EXYNOS_HDMI
|
|
|
|
|
ret = platform_driver_register(&hdmi_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_hdmi;
|
|
|
|
|
ret = platform_driver_register(&mixer_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_mixer;
|
|
|
|
|
ret = platform_driver_register(&exynos_drm_common_hdmi_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_common_hdmi;
|
2012-10-16 08:20:13 +08:00
|
|
|
|
|
|
|
|
ret = exynos_platform_device_hdmi_register();
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_common_hdmi_dev;
|
2012-03-16 17:47:08 +08:00
|
|
|
#endif
|
|
|
|
|
|
2012-03-21 09:55:26 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_VIDI
|
|
|
|
|
ret = platform_driver_register(&vidi_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_vidi;
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-05-17 19:06:32 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_G2D
|
|
|
|
|
ret = platform_driver_register(&g2d_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_g2d;
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:55 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMC
|
|
|
|
|
ret = platform_driver_register(&fimc_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_fimc;
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_ROTATOR
|
|
|
|
|
ret = platform_driver_register(&rotator_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_rotator;
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:57 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_GSC
|
|
|
|
|
ret = platform_driver_register(&gsc_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_gsc;
|
|
|
|
|
#endif
|
|
|
|
|
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_IPP
|
|
|
|
|
ret = platform_driver_register(&ipp_driver);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_ipp;
|
2013-04-23 13:02:53 +08:00
|
|
|
|
|
|
|
|
ret = exynos_platform_device_ipp_register();
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
goto out_ipp_dev;
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#endif
|
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
ret = platform_driver_register(&exynos_drm_platform_driver);
|
|
|
|
|
if (ret < 0)
|
2012-10-16 08:20:12 +08:00
|
|
|
goto out_drm;
|
|
|
|
|
|
|
|
|
|
exynos_drm_pdev = platform_device_register_simple("exynos-drm", -1,
|
|
|
|
|
NULL, 0);
|
2013-04-22 16:13:13 +08:00
|
|
|
if (IS_ERR(exynos_drm_pdev)) {
|
2012-10-16 08:20:12 +08:00
|
|
|
ret = PTR_ERR(exynos_drm_pdev);
|
2012-03-16 17:47:08 +08:00
|
|
|
goto out;
|
2012-10-16 08:20:12 +08:00
|
|
|
}
|
2012-03-16 17:47:08 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
out:
|
2012-10-16 08:20:12 +08:00
|
|
|
platform_driver_unregister(&exynos_drm_platform_driver);
|
|
|
|
|
|
|
|
|
|
out_drm:
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_IPP
|
2013-04-23 13:02:53 +08:00
|
|
|
exynos_platform_device_ipp_unregister();
|
|
|
|
|
out_ipp_dev:
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
platform_driver_unregister(&ipp_driver);
|
|
|
|
|
out_ipp:
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:57 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_GSC
|
|
|
|
|
platform_driver_unregister(&gsc_driver);
|
|
|
|
|
out_gsc:
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_ROTATOR
|
|
|
|
|
platform_driver_unregister(&rotator_driver);
|
|
|
|
|
out_rotator:
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:55 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMC
|
|
|
|
|
platform_driver_unregister(&fimc_driver);
|
|
|
|
|
out_fimc:
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-05-17 19:06:32 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_G2D
|
|
|
|
|
platform_driver_unregister(&g2d_driver);
|
|
|
|
|
out_g2d:
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-03-21 09:55:26 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_VIDI
|
|
|
|
|
platform_driver_unregister(&vidi_driver);
|
2012-10-16 08:20:13 +08:00
|
|
|
out_vidi:
|
2012-03-21 09:55:26 +08:00
|
|
|
#endif
|
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_HDMI
|
2012-10-16 08:20:13 +08:00
|
|
|
exynos_platform_device_hdmi_unregister();
|
|
|
|
|
out_common_hdmi_dev:
|
2012-03-16 17:47:08 +08:00
|
|
|
platform_driver_unregister(&exynos_drm_common_hdmi_driver);
|
|
|
|
|
out_common_hdmi:
|
|
|
|
|
platform_driver_unregister(&mixer_driver);
|
|
|
|
|
out_mixer:
|
|
|
|
|
platform_driver_unregister(&hdmi_driver);
|
|
|
|
|
out_hdmi:
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMD
|
|
|
|
|
platform_driver_unregister(&fimd_driver);
|
|
|
|
|
out_fimd:
|
|
|
|
|
#endif
|
|
|
|
|
return ret;
|
2011-10-04 18:19:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void __exit exynos_drm_exit(void)
|
|
|
|
|
{
|
2012-10-16 08:20:12 +08:00
|
|
|
platform_device_unregister(exynos_drm_pdev);
|
|
|
|
|
|
2011-10-04 18:19:01 +08:00
|
|
|
platform_driver_unregister(&exynos_drm_platform_driver);
|
2012-03-16 17:47:08 +08:00
|
|
|
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_IPP
|
2013-04-23 13:02:53 +08:00
|
|
|
exynos_platform_device_ipp_unregister();
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
platform_driver_unregister(&ipp_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:57 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_GSC
|
|
|
|
|
platform_driver_unregister(&gsc_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_ROTATOR
|
|
|
|
|
platform_driver_unregister(&rotator_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-12-14 16:58:55 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMC
|
|
|
|
|
platform_driver_unregister(&fimc_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-05-17 19:06:32 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_G2D
|
|
|
|
|
platform_driver_unregister(&g2d_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_HDMI
|
2012-10-16 08:20:13 +08:00
|
|
|
exynos_platform_device_hdmi_unregister();
|
2012-03-16 17:47:08 +08:00
|
|
|
platform_driver_unregister(&exynos_drm_common_hdmi_driver);
|
|
|
|
|
platform_driver_unregister(&mixer_driver);
|
|
|
|
|
platform_driver_unregister(&hdmi_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-03-21 09:55:26 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_VIDI
|
|
|
|
|
platform_driver_unregister(&vidi_driver);
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMD
|
|
|
|
|
platform_driver_unregister(&fimd_driver);
|
|
|
|
|
#endif
|
2011-10-04 18:19:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
module_init(exynos_drm_init);
|
|
|
|
|
module_exit(exynos_drm_exit);
|
|
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
|
|
|
|
|
MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
|
|
|
|
|
MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
|
|
|
|
|
MODULE_DESCRIPTION("Samsung SoC DRM Driver");
|
|
|
|
|
MODULE_LICENSE("GPL");
|