2011-10-17 20:56:41 +08:00
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* Atmel Direct Memory Access Controller (DMA)
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Required properties:
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2013-04-19 17:11:18 +08:00
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- compatible: Should be "atmel,<chip>-dma".
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- reg: Should contain DMA registers location and length.
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- interrupts: Should contain DMA interrupt.
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- #dma-cells: Must be <2>, used to represent the number of integer cells in
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the dmas property of client devices.
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2011-10-17 20:56:41 +08:00
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2013-04-19 17:11:18 +08:00
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Example:
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2011-10-17 20:56:41 +08:00
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2013-04-19 17:11:18 +08:00
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dma0: dma@ffffec00 {
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2011-10-17 20:56:41 +08:00
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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interrupts = <21>;
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2013-04-19 17:11:18 +08:00
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#dma-cells = <2>;
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};
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DMA clients connected to the Atmel DMA controller must use the format
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described in the dma.txt file, using a three-cell specifier for each channel:
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2013-07-22 23:13:48 +08:00
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a phandle plus two integer cells.
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2013-04-19 17:11:18 +08:00
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The three cells in order are:
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1. A phandle pointing to the DMA controller.
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2. The memory interface (16 most significant bits), the peripheral interface
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(16 less significant bits).
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2013-06-13 16:39:39 +08:00
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3. Parameters for the at91 DMA configuration register which are device
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2013-07-22 23:13:48 +08:00
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dependent:
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2013-06-13 16:39:39 +08:00
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- bit 7-0: peripheral identifier for the hardware handshaking interface. The
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identifier can be different for tx and rx.
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2013-10-04 16:46:51 +08:00
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- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
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2013-04-19 17:11:18 +08:00
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Example:
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i2c0@i2c@f8010000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8010000 0x100>;
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interrupts = <9 4 6>;
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dmas = <&dma0 1 7>,
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<&dma0 1 8>;
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dma-names = "tx", "rx";
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2011-10-17 20:56:41 +08:00
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};
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