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linux/arch/mips/boot/dts/brcm/bcm7425.dtsi

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MIPS: BMIPS: Add DTS files for several platforms Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8858/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-12-26 01:49:20 +08:00
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm7425";
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-hpt-frequency = <163125000>;
cpu@0 {
compatible = "brcm,bmips5000";
device_type = "cpu";
reg = <0>;
};
cpu@1 {
compatible = "brcm,bmips5000";
device_type = "cpu";
reg = <1>;
};
};
aliases {
uart0 = &uart0;
};
cpu_intc: cpu_intc {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#interrupt-cells = <1>;
};
clocks {
uart_clk: uart_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <81000000>;
};
};
rdb {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
periph_intc: periph_intc@41a400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x41a400 0x30>, <0x41a600 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpu_intc>;
interrupts = <2>, <3>;
};
sun_l2_intc: sun_l2_intc@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <47>;
};
gisb-arb@400000 {
compatible = "brcm,bcm7400-gisb-arb";
reg = <0x400000 0xdc>;
native-endian;
interrupt-parent = <&sun_l2_intc>;
interrupts = <0>, <2>;
brcm,gisb-arb-master-mask = <0x177b>;
brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0",
"bsp_0", "rdc_0",
"raaga_0", "avd_1",
"jtag_0", "svd_0",
"vice_0";
};
upg_irq0_intc: upg_irq0_intc@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
brcm,int-map-mask = <0x44>;
brcm,int-fwd-mask = <0x70000>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <55>;
};
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
little-endian;
};
reboot {
compatible = "brcm,brcmstb-reboot";
syscon = <&sun_top_ctrl 0x304 0x308>;
};
uart0: serial@406b00 {
compatible = "ns16550a";
reg = <0x406b00 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <61>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
mac-address = [ 00 10 18 36 23 1a ];
compatible = "brcm,genet-v3";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0xb80000 0x11c88>;
interrupts = <17>, <18>;
interrupt-parent = <&periph_intc>;
status = "disabled";
mdio@e14 {
compatible = "brcm,genet-mdio-v3";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0xe14 0x8>;
phy1: ethernet-phy@1 {
max-speed = <100>;
reg = <0x1>;
compatible = "brcm,40nm-ephy",
"ethernet-phy-ieee802.3-c22";
};
};
};
ehci0: usb@480300 {
compatible = "brcm,bcm7425-ehci", "generic-ehci";
reg = <0x480300 0x100>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <65>;
status = "disabled";
};
ohci0: usb@480400 {
compatible = "brcm,bcm7425-ohci", "generic-ohci";
reg = <0x480400 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <67>;
status = "disabled";
};
ehci1: usb@480500 {
compatible = "brcm,bcm7425-ehci", "generic-ehci";
reg = <0x480500 0x100>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <66>;
status = "disabled";
};
ohci1: usb@480600 {
compatible = "brcm,bcm7425-ohci", "generic-ohci";
reg = <0x480600 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <68>;
status = "disabled";
};
ehci2: usb@490300 {
compatible = "brcm,bcm7425-ehci", "generic-ehci";
reg = <0x490300 0x100>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <70>;
status = "disabled";
};
ohci2: usb@490400 {
compatible = "brcm,bcm7425-ohci", "generic-ohci";
reg = <0x490400 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <72>;
status = "disabled";
};
ehci3: usb@490500 {
compatible = "brcm,bcm7425-ehci", "generic-ehci";
reg = <0x490500 0x100>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <71>;
status = "disabled";
};
ohci3: usb@490600 {
compatible = "brcm,bcm7425-ohci", "generic-ohci";
reg = <0x490600 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <73>;
status = "disabled";
};
};
};