2006-08-30 06:12:40 +08:00
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/*
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2008-10-27 23:09:10 +08:00
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* New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk>
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2006-08-30 06:12:40 +08:00
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*
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* TODO: Mode selection filtering
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* TODO: Needs custom DMA cleanup code
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*
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* Based very heavily on
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*
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* linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
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*
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* Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
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* May be copied or modified under the terms of the GNU General Public License
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*
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* Development of this chipset driver was funded
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* by the nice folks at National Semiconductor.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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2006-08-31 12:03:49 +08:00
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*
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2006-08-30 06:12:40 +08:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "sc1200"
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2007-08-31 16:54:06 +08:00
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#define DRV_VERSION "0.2.6"
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2006-08-30 06:12:40 +08:00
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#define SC1200_REV_A 0x00
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#define SC1200_REV_B1 0x01
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#define SC1200_REV_B3 0x02
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#define SC1200_REV_C1 0x03
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#define SC1200_REV_D1 0x04
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/**
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* sc1200_clock - PCI clock
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*
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* Return the PCI bus clocking for the SC1200 chipset configuration
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* in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
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*/
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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static int sc1200_clock(void)
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{
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/* Magic registers that give us the chipset data */
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u8 chip_id = inb(0x903C);
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u8 silicon_rev = inb(0x903D);
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u16 pci_clock;
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
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return 0; /* 33 MHz mode */
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/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
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0/3 is 33Mhz 1 is 48 2 is 66 */
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pci_clock = inw(0x901E);
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pci_clock >>= 8;
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pci_clock &= 0x03;
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if (pci_clock == 3)
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pci_clock = 0;
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return pci_clock;
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}
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/**
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* sc1200_set_piomode - PIO setup
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* @ap: ATA interface
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* @adev: device on the interface
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*
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* Set our PIO requirements. This is fairly simple on the SC1200
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*/
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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static const u32 pio_timings[4][5] = {
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{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
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{0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
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{0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
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{0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131} // format1, 66Mhz
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};
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 format;
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unsigned int reg = 0x40 + 0x10 * ap->port_no;
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int mode = adev->pio_mode - XFER_PIO_0;
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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pci_read_config_dword(pdev, reg + 4, &format);
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format >>= 31;
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format += sc1200_clock();
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2006-08-31 12:03:49 +08:00
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pci_write_config_dword(pdev, reg + 8 * adev->devno,
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2006-08-30 06:12:40 +08:00
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pio_timings[format][mode]);
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}
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/**
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* sc1200_set_dmamode - DMA timing setup
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* @ap: ATA interface
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* @adev: Device being configured
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*
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* We cannot mix MWDMA and UDMA without reloading timings each switch
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* master to slave.
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*/
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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static const u32 udma_timing[3][3] = {
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{ 0x00921250, 0x00911140, 0x00911030 },
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{ 0x00932470, 0x00922260, 0x00922140 },
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{ 0x009436A1, 0x00933481, 0x00923261 }
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};
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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static const u32 mwdma_timing[3][3] = {
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{ 0x00077771, 0x00012121, 0x00002020 },
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{ 0x000BBBB2, 0x00024241, 0x00013131 },
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{ 0x000FFFF3, 0x00035352, 0x00015151 }
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};
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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int clock = sc1200_clock();
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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unsigned int reg = 0x40 + 0x10 * ap->port_no;
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int mode = adev->dma_mode;
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u32 format;
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if (mode >= XFER_UDMA_0)
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format = udma_timing[clock][mode - XFER_UDMA_0];
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else
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format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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if (adev->devno == 0) {
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u32 timings;
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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pci_read_config_dword(pdev, reg + 4, &timings);
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timings &= 0x80000000UL;
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timings |= format;
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pci_write_config_dword(pdev, reg + 4, timings);
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} else
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pci_write_config_dword(pdev, reg + 12, format);
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}
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/**
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2008-04-07 21:47:16 +08:00
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* sc1200_qc_issue - command issue
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2006-08-30 06:12:40 +08:00
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* @qc: command pending
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*
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* Called when the libata layer is about to issue a command. We wrap
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* this interface so that we can load the correct ATA timings if
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2007-10-20 05:10:43 +08:00
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* necessary. Specifically we have a problem that there is only
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2006-08-30 06:12:40 +08:00
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* one MWDMA/UDMA bit.
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*/
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2008-04-07 21:47:16 +08:00
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static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
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2006-08-30 06:12:40 +08:00
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{
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struct ata_port *ap = qc->ap;
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struct ata_device *adev = qc->dev;
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struct ata_device *prev = ap->private_data;
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/* See if the DMA settings could be wrong */
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2008-08-01 16:18:34 +08:00
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if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
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2006-08-30 06:12:40 +08:00
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/* Maybe, but do the channels match MWDMA/UDMA ? */
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2008-08-01 16:18:34 +08:00
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if ((ata_using_udma(adev) && !ata_using_udma(prev)) ||
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(ata_using_udma(prev) && !ata_using_udma(adev)))
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2006-08-30 06:12:40 +08:00
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/* Switch the mode bits */
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sc1200_set_dmamode(ap, adev);
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}
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2008-04-07 21:47:16 +08:00
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return ata_sff_qc_issue(qc);
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2006-08-30 06:12:40 +08:00
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}
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2009-03-24 18:22:25 +08:00
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/**
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* sc1200_qc_defer - implement serialization
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* @qc: command
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*
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* Serialize command issue on this controller.
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*/
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static int sc1200_qc_defer(struct ata_queued_cmd *qc)
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{
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struct ata_host *host = qc->ap->host;
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struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
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int rc;
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/* First apply the usual rules */
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rc = ata_std_qc_defer(qc);
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if (rc != 0)
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return rc;
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/* Now apply serialization rules. Only allow a command if the
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other channel state machine is idle */
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if (alt && alt->qc_active)
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return ATA_DEFER_PORT;
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return 0;
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}
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2006-08-30 06:12:40 +08:00
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static struct scsi_host_template sc1200_sht = {
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2008-03-25 11:22:49 +08:00
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ATA_BMDMA_SHT(DRV_NAME),
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.sg_tablesize = LIBATA_DUMB_MAX_PRD,
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2006-08-30 06:12:40 +08:00
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};
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static struct ata_port_operations sc1200_port_ops = {
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libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 11:22:49 +08:00
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.inherits = &ata_bmdma_port_ops,
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2010-05-11 03:41:40 +08:00
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.qc_prep = ata_bmdma_dumb_qc_prep,
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2008-04-07 21:47:16 +08:00
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.qc_issue = sc1200_qc_issue,
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2009-03-24 18:22:25 +08:00
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.qc_defer = sc1200_qc_defer,
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libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 11:22:49 +08:00
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.cable_detect = ata_cable_40wire,
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.set_piomode = sc1200_set_piomode,
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.set_dmamode = sc1200_set_dmamode,
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2006-08-31 12:03:49 +08:00
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};
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2006-08-30 06:12:40 +08:00
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/**
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* sc1200_init_one - Initialise an SC1200
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* @dev: PCI device
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* @id: Entry in match table
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*
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* Just throw the needed data at the libata helper and it does all
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* our work.
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*/
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2006-08-31 12:03:49 +08:00
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2006-08-30 06:12:40 +08:00
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static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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2007-05-04 18:43:58 +08:00
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static const struct ata_port_info info = {
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2007-05-28 18:59:48 +08:00
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.flags = ATA_FLAG_SLAVE_POSS,
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2009-03-15 04:38:24 +08:00
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA2,
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2006-08-30 06:12:40 +08:00
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.port_ops = &sc1200_port_ops
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};
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2009-10-06 23:07:51 +08:00
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const struct ata_port_info *ppi[] = { &info, NULL };
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2007-05-04 18:43:58 +08:00
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2010-02-23 15:26:06 +08:00
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return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL, 0);
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2006-08-30 06:12:40 +08:00
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}
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2006-09-29 08:21:59 +08:00
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static const struct pci_device_id sc1200[] = {
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },
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{ },
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2006-08-30 06:12:40 +08:00
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};
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static struct pci_driver sc1200_pci_driver = {
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2006-09-29 08:21:59 +08:00
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.name = DRV_NAME,
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2006-08-30 06:12:40 +08:00
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.id_table = sc1200,
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.probe = sc1200_init_one,
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2006-11-23 00:57:36 +08:00
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.remove = ata_pci_remove_one,
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2007-03-02 16:31:26 +08:00
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#ifdef CONFIG_PM
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2006-11-23 00:57:36 +08:00
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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2007-03-02 16:31:26 +08:00
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#endif
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2006-08-30 06:12:40 +08:00
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};
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static int __init sc1200_init(void)
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{
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return pci_register_driver(&sc1200_pci_driver);
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}
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static void __exit sc1200_exit(void)
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{
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pci_unregister_driver(&sc1200_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox, Mark Lord");
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MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, sc1200);
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MODULE_VERSION(DRV_VERSION);
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module_init(sc1200_init);
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module_exit(sc1200_exit);
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