2018-03-20 22:58:06 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_COMMON_H_
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#define _ICE_COMMON_H_
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#include "ice.h"
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#include "ice_type.h"
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ice: Get switch config, scheduler config and device capabilities
This patch adds to the initialization flow by getting switch
configuration, scheduler configuration and device capabilities.
Switch configuration:
On boot, an L2 switch element is created in the firmware per physical
function. Each physical function is also mapped to a port, to which its
switch element is connected. In other words, this switch can be visualized
as an embedded vSwitch that can connect a physical function's virtual
station interfaces (VSIs) to the egress/ingress port. Egress/ingress
filters will be eventually created and applied on this switch element.
As part of the initialization flow, the driver gets configuration data
from this switch element and stores it.
Scheduler configuration:
The Tx scheduler is a subsystem responsible for setting and enforcing QoS.
As part of the initialization flow, the driver queries and stores the
default scheduler configuration for the given physical function.
Device capabilities:
As part of initialization, the driver has to determine what the device is
capable of (ex. max queues, VSIs, etc). This information is obtained from
the firmware and stored by the driver.
CC: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-20 22:58:08 +08:00
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#include "ice_switch.h"
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2018-03-20 22:58:06 +08:00
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void ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf,
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u16 buf_len);
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2018-03-20 22:58:07 +08:00
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enum ice_status ice_init_hw(struct ice_hw *hw);
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void ice_deinit_hw(struct ice_hw *hw);
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enum ice_status ice_check_reset(struct ice_hw *hw);
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enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
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2018-03-20 22:58:06 +08:00
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enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
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void ice_shutdown_all_ctrlq(struct ice_hw *hw);
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enum ice_status
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2018-03-20 22:58:10 +08:00
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ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_rq_event_info *e, u16 *pending);
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enum ice_status
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2018-03-20 22:58:07 +08:00
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ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
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enum ice_aq_res_access_type access);
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void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
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enum ice_status ice_init_nvm(struct ice_hw *hw);
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enum ice_status
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2018-03-20 22:58:06 +08:00
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ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_aq_desc *desc, void *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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2018-03-20 22:58:07 +08:00
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void ice_clear_pxe_mode(struct ice_hw *hw);
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ice: Get switch config, scheduler config and device capabilities
This patch adds to the initialization flow by getting switch
configuration, scheduler configuration and device capabilities.
Switch configuration:
On boot, an L2 switch element is created in the firmware per physical
function. Each physical function is also mapped to a port, to which its
switch element is connected. In other words, this switch can be visualized
as an embedded vSwitch that can connect a physical function's virtual
station interfaces (VSIs) to the egress/ingress port. Egress/ingress
filters will be eventually created and applied on this switch element.
As part of the initialization flow, the driver gets configuration data
from this switch element and stores it.
Scheduler configuration:
The Tx scheduler is a subsystem responsible for setting and enforcing QoS.
As part of the initialization flow, the driver queries and stores the
default scheduler configuration for the given physical function.
Device capabilities:
As part of initialization, the driver has to determine what the device is
capable of (ex. max queues, VSIs, etc). This information is obtained from
the firmware and stored by the driver.
CC: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-20 22:58:08 +08:00
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enum ice_status ice_get_caps(struct ice_hw *hw);
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2018-03-20 22:58:13 +08:00
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enum ice_status
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ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
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u32 rxq_index);
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2018-03-20 22:58:15 +08:00
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enum ice_status
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ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_id, u8 lut_type, u8 *lut,
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u16 lut_size);
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enum ice_status
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ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_id, u8 lut_type, u8 *lut,
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u16 lut_size);
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enum ice_status
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ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_id,
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struct ice_aqc_get_set_rss_keys *keys);
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enum ice_status
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ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_id,
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struct ice_aqc_get_set_rss_keys *keys);
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2018-03-20 22:58:06 +08:00
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bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
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enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
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void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
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2018-03-20 22:58:13 +08:00
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extern const struct ice_ctx_ele ice_tlan_ctx_info[];
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enum ice_status
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ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
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2018-03-20 22:58:06 +08:00
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enum ice_status
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ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
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void *buf, u16 buf_size, struct ice_sq_cd *cd);
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enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
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2018-03-20 22:58:07 +08:00
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enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
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2018-03-20 22:58:09 +08:00
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enum ice_status
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2018-03-20 22:58:16 +08:00
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ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool atomic_restart);
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enum ice_status
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ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
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struct ice_sq_cd *cd);
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enum ice_status
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2018-03-20 22:58:09 +08:00
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ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
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struct ice_link_status *link, struct ice_sq_cd *cd);
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2018-03-20 22:58:13 +08:00
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enum ice_status
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ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
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u32 *q_teids, struct ice_sq_cd *cmd_details);
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enum ice_status
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ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_id, u8 tc, u8 num_qgrps,
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struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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2018-03-20 22:58:06 +08:00
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#endif /* _ICE_COMMON_H_ */
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