mirror of https://gitee.com/openkylin/linux.git
ARM: ep93xx: switch to GENERIC_CLOCKEVENTS
This switches the EP93xx to use GENERIC_CLOCKEVENTS and CLKSRC_MMIO. Also implements a sched_clock() hook. Tested on the SIM.ONE. Use only oneshot events. Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
parent
361c81f996
commit
000bc17817
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@ -418,11 +418,12 @@ config ARCH_EP93XX
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bool "EP93xx-based"
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_USES_GETTIMEOFFSET
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select ARM_AMBA
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select ARM_VIC
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CPU_ARM920T
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select GENERIC_CLOCKEVENTS
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help
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This enables support for the Cirrus EP93xx series of CPUs.
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@ -1,5 +1,8 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/sched_clock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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@ -45,26 +48,68 @@
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#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
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#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
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#define EP93XX_TIMER123_CLOCK 508469
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#define EP93XX_TIMER4_CLOCK 983040
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#define EP93XX_TIMER123_RATE 508469
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#define EP93XX_TIMER4_RATE 983040
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#define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
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#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(EP93XX_TIMER4_CLOCK, HZ)
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static u64 notrace ep93xx_read_sched_clock(void)
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{
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u64 ret;
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static unsigned int last_jiffy_time;
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ret = __raw_readl(EP93XX_TIMER4_VALUE_LOW);
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ret |= ((u64) (__raw_readl(EP93XX_TIMER4_VALUE_HIGH) & 0xff) << 32);
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return ret;
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}
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cycle_t ep93xx_clocksource_read(struct clocksource *c)
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{
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u64 ret;
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ret = __raw_readl(EP93XX_TIMER4_VALUE_LOW);
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ret |= ((u64) (__raw_readl(EP93XX_TIMER4_VALUE_HIGH) & 0xff) << 32);
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return (cycle_t) ret;
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}
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static int ep93xx_clkevt_set_next_event(unsigned long next,
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struct clock_event_device *evt)
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{
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/* Default mode: periodic, off, 508 kHz */
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u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
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EP93XX_TIMER123_CONTROL_CLKSEL;
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/* Clear timer */
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__raw_writel(tmode, EP93XX_TIMER1_CONTROL);
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/* Set next event */
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__raw_writel(next, EP93XX_TIMER1_LOAD);
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__raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
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EP93XX_TIMER1_CONTROL);
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return 0;
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}
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static void ep93xx_clkevt_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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/* Disable timer */
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__raw_writel(0, EP93XX_TIMER1_CONTROL);
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}
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static struct clock_event_device ep93xx_clockevent = {
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.name = "timer1",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = ep93xx_clkevt_set_mode,
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.set_next_event = ep93xx_clkevt_set_next_event,
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.rating = 300,
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};
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static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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/* Writing any value clears the timer interrupt */
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__raw_writel(1, EP93XX_TIMER1_CLEAR);
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/* Recover lost jiffies */
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while ((signed long)
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(__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
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>= TIMER4_TICKS_PER_JIFFY) {
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last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
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timer_tick();
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}
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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@ -73,40 +118,25 @@ static struct irqaction ep93xx_timer_irq = {
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.name = "ep93xx timer",
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.flags = IRQF_TIMER | IRQF_IRQPOLL,
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.handler = ep93xx_timer_interrupt,
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.dev_id = &ep93xx_clockevent,
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};
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static u32 ep93xx_gettimeoffset(void)
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{
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int offset;
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offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
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/*
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* Timer 4 is based on a 983.04 kHz reference clock,
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* so dividing by 983040 gives the fraction of a second,
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* so dividing by 0.983040 converts to uS.
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* Refactor the calculation to avoid overflow.
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* Finally, multiply by 1000 to give nS.
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*/
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return (offset + (53 * offset / 3072)) * 1000;
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}
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void __init ep93xx_timer_init(void)
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{
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u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
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EP93XX_TIMER123_CONTROL_CLKSEL;
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arch_gettimeoffset = ep93xx_gettimeoffset;
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/* Enable periodic HZ timer. */
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__raw_writel(tmode, EP93XX_TIMER1_CONTROL);
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__raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
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__raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
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EP93XX_TIMER1_CONTROL);
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/* Enable lost jiffy timer. */
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/* Enable and register clocksource and sched_clock on timer 4 */
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__raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
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EP93XX_TIMER4_VALUE_HIGH);
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clocksource_mmio_init(NULL, "timer4",
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EP93XX_TIMER4_RATE, 200, 40,
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ep93xx_clocksource_read);
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sched_clock_register(ep93xx_read_sched_clock, 40,
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EP93XX_TIMER4_RATE);
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/* Set up clockevent on timer 1 */
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setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
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// FIXME: timer one is 16 bits 1-ffff use timer 3 1-ffffffff */
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clockevents_config_and_register(&ep93xx_clockevent,
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EP93XX_TIMER123_RATE,
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1,
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0xffffU);
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}
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