mirror of https://gitee.com/openkylin/linux.git
OMAP: id: remove OMAP_CHIP declarations, code
Now that all of the users of the OMAP_CHIP bitfield code have been converted to use lists, the OMAP_CHIP code, data, and declarations can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
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d6504acd21
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00c46b3069
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@ -28,7 +28,6 @@
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#include "control.h"
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static struct omap_chip_id omap_chip;
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static unsigned int omap_revision;
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u32 omap_features;
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@ -39,19 +38,6 @@ unsigned int omap_rev(void)
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}
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EXPORT_SYMBOL(omap_rev);
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/**
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* omap_chip_is - test whether currently running OMAP matches a chip type
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* @oc: omap_chip_t to test against
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*
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* Test whether the currently-running OMAP chip matches the supplied
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* chip type 'oc'. Returns 1 upon a match; 0 upon failure.
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*/
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int omap_chip_is(struct omap_chip_id oci)
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{
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return (oci.oc & omap_chip.oc) ? 1 : 0;
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}
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EXPORT_SYMBOL(omap_chip_is);
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int omap_type(void)
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{
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u32 val = 0;
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@ -248,8 +234,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
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u16 hawkeye;
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u8 rev;
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omap_chip.oc = CHIP_IS_OMAP3430;
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/*
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* We cannot access revision registers on ES1.0.
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* If the processor type is Cortex-A8 and the revision is 0x0
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@ -258,7 +242,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
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cpuid = read_cpuid(CPUID_ID);
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if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
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omap_revision = OMAP3430_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP3430ES1;
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*cpu_rev = "1.0";
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return;
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}
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@ -280,22 +263,18 @@ static void __init omap3_check_revision(const char **cpu_rev)
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case 0: /* Take care of early samples */
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case 1:
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omap_revision = OMAP3430_REV_ES2_0;
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omap_chip.oc |= CHIP_IS_OMAP3430ES2;
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*cpu_rev = "2.0";
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break;
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case 2:
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omap_revision = OMAP3430_REV_ES2_1;
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omap_chip.oc |= CHIP_IS_OMAP3430ES2;
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*cpu_rev = "2.1";
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break;
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case 3:
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omap_revision = OMAP3430_REV_ES3_0;
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
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*cpu_rev = "3.0";
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break;
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case 4:
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omap_revision = OMAP3430_REV_ES3_1;
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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*cpu_rev = "3.1";
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break;
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case 7:
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@ -303,9 +282,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
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default:
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/* Use the latest known revision as default */
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omap_revision = OMAP3430_REV_ES3_1_2;
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/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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*cpu_rev = "3.1.2";
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}
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break;
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@ -315,8 +291,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
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*
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* Set the device to be OMAP3517 here. Actual device
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* is identified later based on the features.
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*
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* REVISIT: AM3505/AM3517 should have their own CHIP_IS
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*/
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switch (rev) {
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case 0:
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@ -329,11 +303,9 @@ static void __init omap3_check_revision(const char **cpu_rev)
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omap_revision = OMAP3517_REV_ES1_1;
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*cpu_rev = "1.1";
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}
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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break;
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case 0xb891:
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/* Handle 36xx devices */
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omap_chip.oc |= CHIP_IS_OMAP3630ES1;
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switch(rev) {
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case 0: /* Take care of early samples */
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@ -342,20 +314,16 @@ static void __init omap3_check_revision(const char **cpu_rev)
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break;
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case 1:
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omap_revision = OMAP3630_REV_ES1_1;
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omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
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*cpu_rev = "1.1";
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break;
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case 2:
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/* FALLTHROUGH */
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default:
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omap_revision = OMAP3630_REV_ES1_2;
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omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
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*cpu_rev = "1.2";
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}
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break;
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case 0xb81e:
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omap_chip.oc = CHIP_IS_TI816X;
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switch (rev) {
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case 0:
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omap_revision = TI8168_REV_ES1_0;
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@ -372,7 +340,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
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default:
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/* Unknown default to latest silicon rev as default */
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omap_revision = OMAP3630_REV_ES1_2;
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omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
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*cpu_rev = "1.2";
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pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
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}
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@ -407,24 +374,20 @@ static void __init omap4_check_revision(void)
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switch (rev) {
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case 0:
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omap_revision = OMAP4430_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES1;
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break;
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case 1:
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default:
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omap_revision = OMAP4430_REV_ES2_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2;
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}
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break;
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case 0xb95c:
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switch (rev) {
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case 3:
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omap_revision = OMAP4430_REV_ES2_1;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2_1;
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break;
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case 4:
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default:
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omap_revision = OMAP4430_REV_ES2_2;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
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}
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break;
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case 0xb94e:
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@ -432,14 +395,12 @@ static void __init omap4_check_revision(void)
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case 0:
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default:
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omap_revision = OMAP4460_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
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break;
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}
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break;
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default:
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/* Unknown default to latest silicon rev as default */
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omap_revision = OMAP4430_REV_ES2_2;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
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}
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pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
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@ -523,22 +484,6 @@ void __init omap2_check_revision(void)
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} else {
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pr_err("OMAP revision unknown, please fix!\n");
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}
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/*
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* OK, now we know the exact revision. Initialize omap_chip bits
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* for powerdowmain and clockdomain code.
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*/
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if (cpu_is_omap243x()) {
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/* Currently only supports 2430ES2.1 and 2430-all */
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omap_chip.oc |= CHIP_IS_OMAP2430;
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return;
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} else if (cpu_is_omap242x()) {
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/* Currently only supports 2420ES2.1.1 and 2420-all */
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omap_chip.oc |= CHIP_IS_OMAP2420;
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return;
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}
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pr_err("Uninitialized omap_chip, please fix!\n");
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}
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/*
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@ -80,8 +80,6 @@ struct clkops {
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*
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* @div is the divisor that should be applied to the parent clock's rate
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* to produce the current clock's rate.
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*
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* XXX @flags probably should be replaced with an struct omap_chip.
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*/
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struct clksel_rate {
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u32 val;
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@ -44,13 +44,6 @@
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int omap_type(void);
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struct omap_chip_id {
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u16 oc;
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u8 type;
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};
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#define OMAP_CHIP_INIT(x) { .oc = x }
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/*
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* omap_rev bits:
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* CPU id bits (0730, 1510, 1710, 2422...) [31:16]
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@ -402,61 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517)
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#define OMAP446X_CLASS 0x44600044
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#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
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/*
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* omap_chip bits
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*
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* CHIP_IS_OMAP{2420,2430,3430} indicate that a particular structure is
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* valid on all chips of that type. CHIP_IS_OMAP3430ES{1,2} indicates
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* something that is only valid on that particular ES revision.
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*
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* These bits may be ORed together to indicate structures that are
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* available on multiple chip types.
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*
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* To test whether a particular structure matches the current OMAP chip type,
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* use omap_chip_is().
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*
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*/
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#define CHIP_IS_OMAP2420 (1 << 0)
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#define CHIP_IS_OMAP2430 (1 << 1)
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#define CHIP_IS_OMAP3430 (1 << 2)
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#define CHIP_IS_OMAP3430ES1 (1 << 3)
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#define CHIP_IS_OMAP3430ES2 (1 << 4)
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#define CHIP_IS_OMAP3430ES3_0 (1 << 5)
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#define CHIP_IS_OMAP3430ES3_1 (1 << 6)
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#define CHIP_IS_OMAP3630ES1 (1 << 7)
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#define CHIP_IS_OMAP4430ES1 (1 << 8)
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#define CHIP_IS_OMAP3630ES1_1 (1 << 9)
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#define CHIP_IS_OMAP3630ES1_2 (1 << 10)
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#define CHIP_IS_OMAP4430ES2 (1 << 11)
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#define CHIP_IS_OMAP4430ES2_1 (1 << 12)
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#define CHIP_IS_OMAP4430ES2_2 (1 << 13)
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#define CHIP_IS_TI816X (1 << 14)
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#define CHIP_IS_OMAP4460ES1_0 (1 << 15)
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#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
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#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1 | \
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CHIP_IS_OMAP4430ES2 | \
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CHIP_IS_OMAP4430ES2_1 | \
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CHIP_IS_OMAP4430ES2_2 | \
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CHIP_IS_OMAP4460ES1_0)
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/*
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* "GE" here represents "greater than or equal to" in terms of ES
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* levels. So CHIP_GE_OMAP3430ES2 is intended to match all OMAP3430
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* chips at ES2 and beyond, but not, for example, any OMAP lines after
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* OMAP3.
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*/
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#define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \
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CHIP_IS_OMAP3430ES3_0 | \
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CHIP_GE_OMAP3430ES3_1)
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#define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1 | \
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CHIP_IS_OMAP3630ES1 | \
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CHIP_GE_OMAP3630ES1_1)
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#define CHIP_GE_OMAP3630ES1_1 (CHIP_IS_OMAP3630ES1_1 | \
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CHIP_IS_OMAP3630ES1_2)
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int omap_chip_is(struct omap_chip_id oci);
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void omap2_check_revision(void);
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/*
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