mirror of https://gitee.com/openkylin/linux.git
watchdog: remove sirf atlas driver
The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/r/20210120162745.61268-3-arnd@kernel.org Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This commit is contained in:
Arnd Bergmann
Wim Van Sebroeck
parent
b4b12b4845
commit
011eda8c67
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@ -890,16 +890,6 @@ config LPC18XX_WATCHDOG
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To compile this driver as a module, choose M here: the
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module will be called lpc18xx_wdt.
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config ATLAS7_WATCHDOG
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tristate "CSRatlas7 watchdog"
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depends on ARCH_ATLAS7 || COMPILE_TEST
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help
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Say Y here to include Watchdog timer support for the watchdog
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existing on the CSRatlas7 series platforms.
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To compile this driver as a module, choose M here: the
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module will be called atlas7_wdt.
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config RENESAS_WDT
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tristate "Renesas WDT Watchdog"
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depends on ARCH_RENESAS || COMPILE_TEST
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@ -83,7 +83,6 @@ obj-$(CONFIG_MEDIATEK_WATCHDOG) += mtk_wdt.o
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obj-$(CONFIG_DIGICOLOR_WATCHDOG) += digicolor_wdt.o
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obj-$(CONFIG_LPC18XX_WATCHDOG) += lpc18xx_wdt.o
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obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
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obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
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obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
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obj-$(CONFIG_RENESAS_RZAWDT) += rza_wdt.o
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obj-$(CONFIG_ASPEED_WATCHDOG) += aspeed_wdt.o
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@ -1,221 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Watchdog driver for CSR Atlas7
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*
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* Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#define ATLAS7_TIMER_WDT_INDEX 5
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#define ATLAS7_WDT_DEFAULT_TIMEOUT 20
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#define ATLAS7_WDT_CNT_CTRL (0 + 4 * ATLAS7_TIMER_WDT_INDEX)
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#define ATLAS7_WDT_CNT_MATCH (0x18 + 4 * ATLAS7_TIMER_WDT_INDEX)
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#define ATLAS7_WDT_CNT (0x48 + 4 * ATLAS7_TIMER_WDT_INDEX)
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#define ATLAS7_WDT_CNT_EN (BIT(0) | BIT(1))
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#define ATLAS7_WDT_EN 0x64
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static unsigned int timeout = ATLAS7_WDT_DEFAULT_TIMEOUT;
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(timeout, uint, 0);
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(timeout, "Default watchdog timeout (in seconds)");
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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struct atlas7_wdog {
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struct device *dev;
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void __iomem *base;
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unsigned long tick_rate;
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struct clk *clk;
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};
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static unsigned int atlas7_wdt_gettimeleft(struct watchdog_device *wdd)
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{
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struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
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u32 counter, match, delta;
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counter = readl(wdt->base + ATLAS7_WDT_CNT);
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match = readl(wdt->base + ATLAS7_WDT_CNT_MATCH);
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delta = match - counter;
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return delta / wdt->tick_rate;
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}
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static int atlas7_wdt_ping(struct watchdog_device *wdd)
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{
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struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
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u32 counter, match, delta;
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counter = readl(wdt->base + ATLAS7_WDT_CNT);
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delta = wdd->timeout * wdt->tick_rate;
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match = counter + delta;
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writel(match, wdt->base + ATLAS7_WDT_CNT_MATCH);
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return 0;
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}
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static int atlas7_wdt_enable(struct watchdog_device *wdd)
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{
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struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
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atlas7_wdt_ping(wdd);
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writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) | ATLAS7_WDT_CNT_EN,
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wdt->base + ATLAS7_WDT_CNT_CTRL);
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writel(1, wdt->base + ATLAS7_WDT_EN);
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return 0;
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}
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static int atlas7_wdt_disable(struct watchdog_device *wdd)
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{
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struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
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writel(0, wdt->base + ATLAS7_WDT_EN);
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writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) & ~ATLAS7_WDT_CNT_EN,
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wdt->base + ATLAS7_WDT_CNT_CTRL);
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return 0;
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}
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static int atlas7_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
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{
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wdd->timeout = to;
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return 0;
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}
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#define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
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static const struct watchdog_info atlas7_wdt_ident = {
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.options = OPTIONS,
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.firmware_version = 0,
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.identity = "atlas7 Watchdog",
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};
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static const struct watchdog_ops atlas7_wdt_ops = {
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.owner = THIS_MODULE,
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.start = atlas7_wdt_enable,
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.stop = atlas7_wdt_disable,
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.get_timeleft = atlas7_wdt_gettimeleft,
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.ping = atlas7_wdt_ping,
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.set_timeout = atlas7_wdt_settimeout,
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};
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static struct watchdog_device atlas7_wdd = {
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.info = &atlas7_wdt_ident,
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.ops = &atlas7_wdt_ops,
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.timeout = ATLAS7_WDT_DEFAULT_TIMEOUT,
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};
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static const struct of_device_id atlas7_wdt_ids[] = {
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{ .compatible = "sirf,atlas7-tick"},
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{}
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};
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static void atlas7_clk_disable_unprepare(void *data)
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{
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clk_disable_unprepare(data);
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}
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static int atlas7_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct atlas7_wdog *wdt;
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struct clk *clk;
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int ret;
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wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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wdt->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(wdt->base))
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return PTR_ERR(wdt->base);
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clk = devm_clk_get(dev, NULL);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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ret = clk_prepare_enable(clk);
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if (ret) {
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dev_err(dev, "clk enable failed\n");
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return ret;
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}
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ret = devm_add_action_or_reset(dev, atlas7_clk_disable_unprepare, clk);
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if (ret)
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return ret;
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/* disable watchdog hardware */
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writel(0, wdt->base + ATLAS7_WDT_CNT_CTRL);
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wdt->tick_rate = clk_get_rate(clk);
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if (!wdt->tick_rate)
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return -EINVAL;
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wdt->clk = clk;
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atlas7_wdd.min_timeout = 1;
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atlas7_wdd.max_timeout = UINT_MAX / wdt->tick_rate;
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watchdog_init_timeout(&atlas7_wdd, 0, dev);
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watchdog_set_nowayout(&atlas7_wdd, nowayout);
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watchdog_set_drvdata(&atlas7_wdd, wdt);
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platform_set_drvdata(pdev, &atlas7_wdd);
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watchdog_stop_on_reboot(&atlas7_wdd);
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watchdog_stop_on_unregister(&atlas7_wdd);
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return devm_watchdog_register_device(dev, &atlas7_wdd);
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}
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static int __maybe_unused atlas7_wdt_suspend(struct device *dev)
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{
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/*
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* NOTE:timer controller registers settings are saved
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* and restored back by the timer-atlas7.c
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*/
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return 0;
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}
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static int __maybe_unused atlas7_wdt_resume(struct device *dev)
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{
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struct watchdog_device *wdd = dev_get_drvdata(dev);
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/*
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* NOTE: Since timer controller registers settings are saved
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* and restored back by the timer-atlas7.c, so we need not
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* update WD settings except refreshing timeout.
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*/
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atlas7_wdt_ping(wdd);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(atlas7_wdt_pm_ops,
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atlas7_wdt_suspend, atlas7_wdt_resume);
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MODULE_DEVICE_TABLE(of, atlas7_wdt_ids);
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static struct platform_driver atlas7_wdt_driver = {
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.driver = {
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.name = "atlas7-wdt",
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.pm = &atlas7_wdt_pm_ops,
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.of_match_table = atlas7_wdt_ids,
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},
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.probe = atlas7_wdt_probe,
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};
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module_platform_driver(atlas7_wdt_driver);
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MODULE_DESCRIPTION("CSRatlas7 watchdog driver");
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MODULE_AUTHOR("Guo Zeng <Guo.Zeng@csr.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:atlas7-wdt");
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