mirror of https://gitee.com/openkylin/linux.git
arm64: dts: imx8mq-evk: Adjust nodes following alphabetical sort
Adjust some nodes to make them follow alphabetical sort except iomuxc node which is put at the end of file because of its huge pinctrl data. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -115,15 +115,6 @@ ethphy0: ethernet-phy@0 {
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};
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};
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&sai2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_SAI2>;
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assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <0>, <24576000>;
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status = "okay";
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};
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&gpio5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wifi_reset>;
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@ -242,6 +233,29 @@ &pgc_gpu {
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power-supply = <&sw1a_reg>;
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};
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&qspi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi>;
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status = "okay";
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n25q256a: flash@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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};
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};
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&sai2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_SAI2>;
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assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <0>, <24576000>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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@ -261,20 +275,6 @@ &usb_dwc3_1 {
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status = "okay";
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};
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&qspi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi>;
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status = "okay";
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n25q256a: flash@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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};
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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