drm/i915: Clear the pending_gpu_fenced_access flag at the start of execbuffer

Otherwise once we use the buffer with a BLT command on gen2/3, we will
always regard future command submissions as continuing the fenced
access. However, now that we flush/invalidate between every batch we can
drop this pessimism.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Chris Wilson 2012-07-20 12:41:07 +01:00 committed by Daniel Vetter
parent 6ac42f4148
commit 016fd0c1ae
1 changed files with 1 additions and 0 deletions
drivers/gpu/drm/i915

View File

@ -413,6 +413,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
obj->base.pending_read_domains = 0; obj->base.pending_read_domains = 0;
obj->base.pending_write_domain = 0; obj->base.pending_write_domain = 0;
obj->pending_fenced_gpu_access = false;
} }
list_splice(&ordered_objects, objects); list_splice(&ordered_objects, objects);