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ARM: dts: lpc4350-hitex-eval: add emc pins and static memory devices
Setup the emc pins used by external memory devices and add configuration for the devices found on the Hitex eval board. The Hitex eval board has a NOR Flash attached to chip select 0 and 512 kB of SRAM on chip select 2. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -37,6 +37,106 @@ memory {
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};
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&pinctrl {
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emc_pins: emc-pins {
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emc_addr0_23_cfg {
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pins = "p2_9", "p2_10", "p2_11", "p2_12",
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"p2_13", "p1_0", "p1_1", "p1_2",
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"p2_8", "p2_7", "p2_6", "p2_2",
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"p2_1", "p2_0", "p6_8", "p6_7",
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"pd_16", "pd_15", "pe_0", "pe_1",
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"pe_2", "pe_3", "pe_4", "pa_4";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_data0_15_cfg {
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pins = "p1_7", "p1_8", "p1_9", "p1_10",
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"p1_11", "p1_12", "p1_13", "p1_14",
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"p5_4", "p5_5", "p5_6", "p5_7",
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"p5_0", "p5_1", "p5_2", "p5_3";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_we_oe_cfg {
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pins = "p1_6", "p1_3";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_bls0_3_cfg {
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pins = "p1_4", "p6_6", "pd_13", "pd_10";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_cs0_cs2_cfg {
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pins = "p1_5", "pd_12";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_dqm0_3_cfg {
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pins = "p6_12", "p6_10", "pd_0", "pe_13";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_ras_cas_cfg {
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pins = "p6_5", "p6_4";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_dycs0_cfg {
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pins = "p6_9";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_cke_cfg {
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pins = "p6_11";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_clock_cfg {
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pins = "clk0", "clk1", "clk2", "clk3";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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};
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enet_mii_pins: enet-mii-pins {
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enet_mii_rxd0_3_cfg {
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pins = "p1_15", "p0_0", "p9_3", "p9_2";
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@ -103,6 +203,70 @@ uart0_tx_cfg {
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};
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};
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&emc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&emc_pins>;
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cs0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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mpmc,cs = <0>;
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mpmc,memory-width = <16>;
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mpmc,byte-lane-low;
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mpmc,write-enable-delay = <0>;
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mpmc,output-enable-delay = <0>;
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mpmc,read-access-delay = <70>;
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mpmc,page-mode-read-delay = <70>;
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flash@0,0 {
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compatible = "sst,sst39vf320", "cfi-flash";
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reg = <0 0 0x400000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x000000 0x040000>; /* 256 KiB */
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};
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partition@1 {
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label = "kernel";
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reg = <0x040000 0x2C0000>; /* 2.75 MiB */
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};
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partition@2 {
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label = "rootfs";
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reg = <0x300000 0x100000>; /* 1 MiB */
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};
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};
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};
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cs2 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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mpmc,cs = <2>;
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mpmc,memory-width = <16>;
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mpmc,byte-lane-low;
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mpmc,write-enable-delay = <0>;
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mpmc,output-enable-delay = <30>;
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mpmc,read-access-delay = <90>;
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mpmc,page-mode-read-delay = <55>;
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mpmc,write-access-delay = <55>;
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mpmc,turn-round-delay = <55>;
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ext_sram: sram@2,0 {
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compatible = "mmio-sram";
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reg = <2 0 0x80000>; /* 512 KiB SRAM on IS62WV25616 */
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};
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};
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};
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&enet_tx_clk {
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clock-frequency = <25000000>;
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};
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