mirror of https://gitee.com/openkylin/linux.git
arm64: soc: ZynqMP DT changes for v5.10
- Fix IRQ flag for PMIC - Align gpio hogs and leds with naming convention - Rename busses to match DT schema - Tune i2c cadence compatible string - Remove undocumented u-boot properties -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCX3MfRAAKCRDKSWXLKUoM IYrOAJ9Rmw076IwypgsJ4q/t9KvAn3dXSQCfffGvvHE8+rI8ZozVZ+IoSxaL9S0= =qHTW -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx into arm/dt arm64: soc: ZynqMP DT changes for v5.10 - Fix IRQ flag for PMIC - Align gpio hogs and leds with naming convention - Rename busses to match DT schema - Tune i2c cadence compatible string - Remove undocumented u-boot properties * tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx: arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml arm64: dts: xilinx: align GPIO hog names with dtschema arm64: dts: zynqmp-zcu100-revC: correct interrupt flags arm64: dts: xilinx: Align IOMMU nodename with dtschema arm64: dts: zynqmp: Add GTR transceivers Link: https://lore.kernel.org/r/37a0333b-541e-649c-68c5-aa4b52e6b91d@monstr.eu Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
02d0bf1ae8
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@ -10,35 +10,30 @@
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#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
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/ {
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pss_ref_clk: pss_ref_clk {
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u-boot,dm-pre-reloc;
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <33333333>;
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};
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video_clk: video_clk {
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u-boot,dm-pre-reloc;
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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};
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pss_alt_ref_clk: pss_alt_ref_clk {
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u-boot,dm-pre-reloc;
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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gt_crx_ref_clk: gt_crx_ref_clk {
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u-boot,dm-pre-reloc;
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <108000000>;
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};
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aux_ref_clk: aux_ref_clk {
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u-boot,dm-pre-reloc;
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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@ -56,27 +56,27 @@ sw4 {
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leds {
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compatible = "gpio-leds";
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ds2 {
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led-ds2 {
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label = "ds2";
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gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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ds3 {
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led-ds3 {
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label = "ds3";
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gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tx"; /* WLAN tx */
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default-state = "off";
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};
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ds4 {
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led-ds4 {
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label = "ds4";
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gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0rx"; /* WLAN rx */
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default-state = "off";
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};
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ds5 {
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led-ds5 {
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label = "ds5";
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gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "bluetooth-power";
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@ -186,7 +186,7 @@ pmic: pmic@5e { /* Custom TI PMIC u33 */
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compatible = "ti,tps65086";
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reg = <0x5e>;
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interrupt-parent = <&gpio>;
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interrupts = <77 GPIO_ACTIVE_LOW>;
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interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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@ -203,25 +203,25 @@ tca6416_u97: gpio@20 {
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gpio-line-names = "PS_GTR_LAN_SEL0", "PS_GTR_LAN_SEL1", "PS_GTR_LAN_SEL2", "PS_GTR_LAN_SEL3",
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"PCI_CLK_DIR_SEL", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B",
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"", "", "", "", "", "", "", "", "";
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gtr-sel0 {
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gtr-sel0-hog {
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gpio-hog;
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gpios = <0 0>;
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output-low; /* PCIE = 0, DP = 1 */
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line-name = "sel0";
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};
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gtr-sel1 {
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gtr-sel1-hog {
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gpio-hog;
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gpios = <1 0>;
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output-high; /* PCIE = 0, DP = 1 */
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line-name = "sel1";
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};
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gtr-sel2 {
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gtr-sel2-hog {
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gpio-hog;
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gpios = <2 0>;
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output-high; /* PCIE = 0, USB0 = 1 */
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line-name = "sel2";
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};
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gtr-sel3 {
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gtr-sel3-hog {
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gpio-hog;
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gpios = <3 0>;
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output-high; /* PCIE = 0, SATA = 1 */
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@ -13,6 +13,7 @@
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*/
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#include <dt-bindings/power/xlnx-zynqmp-power.h>
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#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
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/ {
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compatible = "xlnx,zynqmp";
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@ -130,7 +131,6 @@ zynqmp_power: zynqmp-power {
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};
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zynqmp_clk: clock-controller {
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u-boot,dm-pre-reloc;
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#clock-cells = <1>;
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compatible = "xlnx,zynqmp-clk";
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clocks = <&pss_ref_clk>,
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@ -182,7 +182,7 @@ fpga_full: fpga-full {
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ranges;
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};
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amba_apu: amba-apu@0 {
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amba_apu: axi@0 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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@ -201,7 +201,7 @@ gic: interrupt-controller@f9010000 {
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};
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};
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amba: amba {
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amba: axi {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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@ -500,7 +500,7 @@ gpio: gpio@ff0a0000 {
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};
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i2c0: i2c@ff020000 {
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compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
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compatible = "cdns,i2c-r1p14";
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 17 4>;
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@ -511,7 +511,7 @@ i2c0: i2c@ff020000 {
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};
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i2c1: i2c@ff030000 {
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compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
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compatible = "cdns,i2c-r1p14";
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 18 4>;
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@ -558,6 +558,15 @@ pcie_intc: legacy-interrupt-controller {
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};
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};
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psgtr: phy@fd400000 {
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compatible = "xlnx,zynqmp-psgtr-v1.1";
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status = "disabled";
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reg = <0x0 0xfd400000 0x0 0x40000>,
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<0x0 0xfd3d0000 0x0 0x1000>;
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reg-names = "serdes", "siou";
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#phy-cells = <4>;
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};
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rtc: rtc@ffa60000 {
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compatible = "xlnx,zynqmp-rtc";
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status = "disabled";
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@ -601,7 +610,7 @@ sdhci1: mmc@ff170000 {
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power-domains = <&zynqmp_firmware PD_SD_1>;
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};
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smmu: smmu@fd800000 {
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smmu: iommu@fd800000 {
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compatible = "arm,mmu-500";
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reg = <0x0 0xfd800000 0x0 0x20000>;
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status = "disabled";
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