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drm/amd/display: DP Compliance 400.1.1 failure 

[Why]
400.1.1 is failing because we are not performing link training when
we get an HPD pulse for the same display. This is breaking DP
compliance

[How]
Always perform link training after HPD pulse if the detection
reason is not  DETECT_REASON_HPDRX.

Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
abdoulaye berthe 2018-07-19 15:39:55 -04:00 committed by Alex Deucher
parent e11d41472a
commit 0301ccbaf6
1 changed files with 28 additions and 26 deletions
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54
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View File

@ -764,39 +764,41 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
if ((prev_sink != NULL) && ((edid_status == EDID_THE_SAME) || (edid_status == EDID_OK))) if ((prev_sink != NULL) && ((edid_status == EDID_THE_SAME) || (edid_status == EDID_OK)))
same_edid = is_same_edid(&prev_sink->dc_edid, &sink->dc_edid); same_edid = is_same_edid(&prev_sink->dc_edid, &sink->dc_edid);
// If both edid and dpcd are the same, then discard new sink and revert back to original sink if (link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT &&
if ((same_edid) && (same_dpcd)) { sink_caps.transaction_type == DDC_TRANSACTION_TYPE_I2C_OVER_AUX &&
link_disconnect_remap(prev_sink, link); reason != DETECT_REASON_HPDRX) {
sink = prev_sink; /*
prev_sink = NULL; * TODO debug why Dell 2413 doesn't like
} else { * two link trainings
if (link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT && */
sink_caps.transaction_type ==
DDC_TRANSACTION_TYPE_I2C_OVER_AUX) {
/*
* TODO debug why Dell 2413 doesn't like
* two link trainings
*/
/* deal with non-mst cases */ /* deal with non-mst cases */
for (i = 0; i < LINK_TRAINING_MAX_VERIFY_RETRY; i++) { for (i = 0; i < LINK_TRAINING_MAX_VERIFY_RETRY; i++) {
int fail_count = 0; int fail_count = 0;
dp_verify_link_cap(link, dp_verify_link_cap(link,
&link->reported_link_cap, &link->reported_link_cap,
&fail_count); &fail_count);
if (fail_count == 0) if (fail_count == 0)
break; break;
}
} }
/* HDMI-DVI Dongle */ } else {
if (sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A && // If edid is the same, then discard new sink and revert back to original sink
!sink->edid_caps.edid_hdmi) if (same_edid) {
sink->sink_signal = SIGNAL_TYPE_DVI_SINGLE_LINK; link_disconnect_remap(prev_sink, link);
sink = prev_sink;
prev_sink = NULL;
}
} }
/* HDMI-DVI Dongle */
if (sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A &&
!sink->edid_caps.edid_hdmi)
sink->sink_signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
/* Connectivity log: detection */ /* Connectivity log: detection */
for (i = 0; i < sink->dc_edid.length / EDID_BLOCK_SIZE; i++) { for (i = 0; i < sink->dc_edid.length / EDID_BLOCK_SIZE; i++) {
CONN_DATA_DETECT(link, CONN_DATA_DETECT(link,