mirror of https://gitee.com/openkylin/linux.git
Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
The problem fixed by0e4ccb1505
("PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()") has been fixed in a simpler way by a previous commit ("PCI/MSI: Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits"). The msi_mask_irq() and msix_mask_irq() x86_msi_ops added by0e4ccb1505
are no longer needed, so revert the commit. default_msi_mask_irq() and default_msix_mask_irq() were added by0e4ccb1505
and are still used by s390, so keep them for now. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David Vrabel <david.vrabel@citrix.com> CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> CC: xen-devel@lists.xenproject.org
This commit is contained in:
parent
38737d82f9
commit
03f56e42d0
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@ -172,7 +172,6 @@ struct x86_platform_ops {
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struct pci_dev;
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struct msi_msg;
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struct msi_desc;
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struct x86_msi_ops {
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int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
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@ -183,8 +182,6 @@ struct x86_msi_ops {
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void (*teardown_msi_irqs)(struct pci_dev *dev);
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void (*restore_msi_irqs)(struct pci_dev *dev);
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int (*setup_hpet_msi)(unsigned int irq, unsigned int id);
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u32 (*msi_mask_irq)(struct msi_desc *desc, u32 mask, u32 flag);
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u32 (*msix_mask_irq)(struct msi_desc *desc, u32 flag);
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};
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struct IO_APIC_route_entry;
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@ -116,8 +116,6 @@ struct x86_msi_ops x86_msi = {
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.teardown_msi_irqs = default_teardown_msi_irqs,
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.restore_msi_irqs = default_restore_msi_irqs,
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.setup_hpet_msi = default_setup_hpet_msi,
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.msi_mask_irq = default_msi_mask_irq,
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.msix_mask_irq = default_msix_mask_irq,
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};
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/* MSI arch specific hooks */
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@ -140,14 +138,6 @@ void arch_restore_msi_irqs(struct pci_dev *dev)
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{
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x86_msi.restore_msi_irqs(dev);
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}
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u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return x86_msi.msi_mask_irq(desc, mask, flag);
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}
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u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return x86_msi.msix_mask_irq(desc, flag);
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}
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#endif
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struct x86_io_apic_ops x86_io_apic_ops = {
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@ -394,14 +394,7 @@ static void xen_teardown_msi_irq(unsigned int irq)
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{
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xen_destroy_irq(irq);
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}
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static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return 0;
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}
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static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return 0;
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}
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#endif
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int __init pci_xen_init(void)
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@ -425,8 +418,6 @@ int __init pci_xen_init(void)
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x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
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x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
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x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
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x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
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x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
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pci_msi_ignore_mask = 1;
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#endif
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return 0;
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@ -507,8 +498,6 @@ int __init pci_xen_initial_domain(void)
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x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
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x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
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x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
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x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
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x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
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pci_msi_ignore_mask = 1;
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#endif
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xen_setup_acpi_sci();
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@ -164,7 +164,7 @@ static inline __attribute_const__ u32 msi_mask(unsigned x)
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* reliably as devices without an INTx disable bit will then generate a
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* level IRQ which will never be cleared.
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*/
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u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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u32 mask_bits = desc->masked;
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@ -178,14 +178,9 @@ u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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return mask_bits;
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}
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__weak u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return default_msi_mask_irq(desc, mask, flag);
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}
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static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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desc->masked = arch_msi_mask_irq(desc, mask, flag);
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desc->masked = __msi_mask_irq(desc, mask, flag);
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}
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/*
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@ -195,7 +190,7 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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* file. This saves a few milliseconds when initialising devices with lots
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* of MSI-X interrupts.
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*/
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u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)
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u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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u32 mask_bits = desc->masked;
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unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
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@ -212,14 +207,9 @@ u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)
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return mask_bits;
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}
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__weak u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return default_msix_mask_irq(desc, flag);
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}
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static void msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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desc->masked = arch_msix_mask_irq(desc, flag);
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desc->masked = __msix_mask_irq(desc, flag);
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}
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static void msi_set_mask_bit(struct irq_data *data, u32 flag)
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@ -874,7 +864,7 @@ void pci_msi_shutdown(struct pci_dev *dev)
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/* Return the device with MSI unmasked as initial states */
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mask = msi_mask(desc->msi_attrib.multi_cap);
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/* Keep cached state to be restored */
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arch_msi_mask_irq(desc, mask, ~mask);
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__msi_mask_irq(desc, mask, ~mask);
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/* Restore dev->irq to its default pin-assertion irq */
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dev->irq = desc->msi_attrib.default_irq;
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@ -972,7 +962,7 @@ void pci_msix_shutdown(struct pci_dev *dev)
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/* Return the device with MSI-X masked as initial states */
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list_for_each_entry(entry, &dev->msi_list, list) {
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/* Keep cached states to be restored */
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arch_msix_mask_irq(entry, 1);
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__msix_mask_irq(entry, 1);
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}
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msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
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@ -22,6 +22,8 @@ void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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void read_msi_msg(unsigned int irq, struct msi_msg *msg);
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void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
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void write_msi_msg(unsigned int irq, struct msi_msg *msg);
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u32 __msix_mask_irq(struct msi_desc *desc, u32 flag);
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u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
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struct msi_desc {
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struct {
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@ -62,8 +64,8 @@ void arch_restore_msi_irqs(struct pci_dev *dev);
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void default_teardown_msi_irqs(struct pci_dev *dev);
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void default_restore_msi_irqs(struct pci_dev *dev);
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u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
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u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag);
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#define default_msi_mask_irq __msi_mask_irq
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#define default_msix_mask_irq __msix_mask_irq
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struct msi_chip {
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struct module *owner;
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