mirror of https://gitee.com/openkylin/linux.git
staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Counting_Mode_Reg()
The "Counting Mode" registers are sequential in the enum ni_gpct_register. Replace this inline CamelCase function with a simple define. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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3da68f50f2
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0412ea4696
drivers/staging/comedi/drivers
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@ -397,7 +397,7 @@ void ni_tio_init_counter(struct ni_gpct *counter)
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0);
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0);
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if (ni_tio_counting_mode_registers_present(counter_dev)) {
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if (ni_tio_counting_mode_registers_present(counter_dev)) {
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Counting_Mode_Reg(counter->
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NITIO_CNT_MODE_REG(counter->
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counter_index), ~0,
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counter_index), ~0,
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0);
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0);
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}
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}
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@ -439,7 +439,7 @@ static void ni_tio_set_sync_mode(struct ni_gpct *counter, int force_alt_sync)
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{
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{
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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const unsigned counting_mode_reg =
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const unsigned counting_mode_reg =
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NITIO_Gi_Counting_Mode_Reg(counter->counter_index);
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NITIO_CNT_MODE_REG(counter->counter_index);
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static const uint64_t min_normal_sync_period_ps = 25000;
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static const uint64_t min_normal_sync_period_ps = 25000;
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const uint64_t clock_period_ps = ni_tio_clock_period_ps(counter,
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const uint64_t clock_period_ps = ni_tio_clock_period_ps(counter,
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ni_tio_generic_clock_src_select
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ni_tio_generic_clock_src_select
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@ -516,7 +516,7 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
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if (mode & NI_GPCT_INDEX_ENABLE_BIT)
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if (mode & NI_GPCT_INDEX_ENABLE_BIT)
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counting_mode_bits |= Gi_Index_Mode_Bit;
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counting_mode_bits |= Gi_Index_Mode_Bit;
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Counting_Mode_Reg(counter->
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NITIO_CNT_MODE_REG(counter->
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counter_index),
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counter_index),
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Gi_Counting_Mode_Mask | Gi_Index_Phase_Mask |
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Gi_Counting_Mode_Mask | Gi_Index_Phase_Mask |
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Gi_Index_Mode_Bit, counting_mode_bits);
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Gi_Index_Mode_Bit, counting_mode_bits);
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@ -582,7 +582,7 @@ int ni_tio_arm(struct ni_gpct *counter, int arm, unsigned start_trigger)
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break;
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break;
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}
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}
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Counting_Mode_Reg
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NITIO_CNT_MODE_REG
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(counter->counter_index),
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(counter->counter_index),
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Gi_HW_Arm_Select_Mask
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Gi_HW_Arm_Select_Mask
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(counter_dev->variant) |
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(counter_dev->variant) |
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@ -792,7 +792,7 @@ static int ni_tio_set_clock_src(struct ni_gpct *counter,
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break;
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break;
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}
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}
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Counting_Mode_Reg(counter->
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NITIO_CNT_MODE_REG(counter->
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counter_index),
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counter_index),
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Gi_Prescale_X2_Bit(counter_dev->variant) |
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Gi_Prescale_X2_Bit(counter_dev->variant) |
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Gi_Prescale_X8_Bit(counter_dev->variant),
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Gi_Prescale_X8_Bit(counter_dev->variant),
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@ -807,7 +807,7 @@ static unsigned ni_tio_clock_src_modifiers(const struct ni_gpct *counter)
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{
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{
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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const unsigned counting_mode_bits = ni_tio_get_soft_copy(counter,
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const unsigned counting_mode_bits = ni_tio_get_soft_copy(counter,
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NITIO_Gi_Counting_Mode_Reg
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NITIO_CNT_MODE_REG
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(counter->
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(counter->
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counter_index));
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counter_index));
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unsigned bits = 0;
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unsigned bits = 0;
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@ -28,21 +28,7 @@
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#define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x))
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#define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x))
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#define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x))
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#define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x))
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#define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x))
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#define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x))
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#define NITIO_CNT_MODE_REG(x) (NITIO_G0_CNT_MODE + (x))
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static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
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{
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switch (idx) {
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case 0:
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return NITIO_G0_CNT_MODE;
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case 1:
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return NITIO_G1_CNT_MODE;
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case 2:
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return NITIO_G2_CNT_MODE;
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case 3:
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return NITIO_G3_CNT_MODE;
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}
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return 0;
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}
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static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
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static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
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{
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{
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