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m68knommu: stop using __do_IRQ 

The use of __do_IRQ is deprecated, so lets stop using it.
Generally the interrupts on the supported processors here are
level triggered, so this is strait forward to switch over to
using the standard handle_level_irq flow handler. (Although
some ColdFire parts support edge triggered GPIO line  interrupts
we have no support for them yet).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2010-09-09 17:12:53 +10:00
parent eb497e7b49
commit 04570b4621
7 changed files with 26 additions and 27 deletions
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4
arch/m68knommu/Kconfig
View File

@ -59,6 +59,10 @@ config GENERIC_HARDIRQS
bool
default y
config GENERIC_HARDIRQS_NO__DO_IRQ
bool
default y
config GENERIC_CALIBRATE_DELAY
bool
default y

8
arch/m68knommu/platform/5272/intc.c
View File

@ -128,11 +128,9 @@ void __init init_IRQ(void)
writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
for (irq = 0; (irq < NR_IRQS); irq++) {
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = NULL;
irq_desc[irq].depth = 1;
irq_desc[irq].chip = &intc_irq_chip;
intc_irq_set_type(irq, 0);
set_irq_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq);
}
}

6
arch/m68knommu/platform/68328/ints.c
View File

@ -179,10 +179,8 @@ void __init init_IRQ(void)
IMR = ~0;
for (i = 0; (i < NR_IRQS); i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].chip = &intc_irq_chip;
set_irq_chip(irq, &intc_irq_chip);
set_irq_handler(irq, handle_level_irq);
}
}

6
arch/m68knommu/platform/68360/ints.c
View File

@ -132,10 +132,8 @@ void init_IRQ(void)
pquicc->intr_cimr = 0x00000000;
for (i = 0; (i < NR_IRQS); i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].chip = &intc_irq_chip;
set_irq_chip(irq, &intc_irq_chip);
set_irq_handler(irq, handle_level_irq);
}
}

13
arch/m68knommu/platform/coldfire/intc-2.c
View File

@ -93,10 +93,16 @@ static void intc_irq_unmask(unsigned int irq)
}
}
static int intc_irq_set_type(unsigned int irq, unsigned int type)
{
return 0;
}
static struct irq_chip intc_irq_chip = {
.name = "CF-INTC",
.mask = intc_irq_mask,
.unmask = intc_irq_unmask,
.set_type = intc_irq_set_type,
};
void __init init_IRQ(void)
@ -112,10 +118,9 @@ void __init init_IRQ(void)
#endif
for (irq = 0; (irq < NR_IRQS); irq++) {
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = NULL;
irq_desc[irq].depth = 1;
irq_desc[irq].chip = &intc_irq_chip;
set_irq_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq);
}
}

8
arch/m68knommu/platform/coldfire/intc-simr.c
View File

@ -70,11 +70,9 @@ void __init init_IRQ(void)
__raw_writeb(0xff, MCFINTC1_SIMR);
for (irq = 0; (irq < NR_IRQS); irq++) {
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = NULL;
irq_desc[irq].depth = 1;
irq_desc[irq].chip = &intc_irq_chip;
intc_irq_set_type(irq, 0);
set_irq_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq);
}
}

8
arch/m68knommu/platform/coldfire/intc.c
View File

@ -143,11 +143,9 @@ void __init init_IRQ(void)
mcf_maskimr(0xffffffff);
for (irq = 0; (irq < NR_IRQS); irq++) {
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = NULL;
irq_desc[irq].depth = 1;
irq_desc[irq].chip = &intc_irq_chip;
intc_irq_set_type(irq, 0);
set_irq_chip(irq, &intc_irq_chip);
set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
set_irq_handler(irq, handle_level_irq);
}
}