First batch of AT91 DT material for 3.18:

- RAM controller rework for multiple controller SoCs
 - shutdown controller addtion
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJUBKUeAAoJEAf03oE53VmQE/kH/1JhMSH6HNovMiYMSL8kraiV
 4LH9uBMMUDFfgSLAe0s+6w+C7eQYiw8lvAMuSPbg/GukXimw32g+gwXIm+dKAJ3S
 PQAhpKu0ojU9OFBlUQagvg0gf+UfeiiaUXl0QWDHNJSRZued6R9hvY+I1wW2+Hwo
 vEOrdS37VyG47yZqa8QGGu0oQVjDovR9F4/5zv0gL+/YgCQMXvItWHJLKP6jncKq
 5Aljd2GKMiEvP3UkOqrXiXvzLz98ncPRKWXiLAI9NKJeu5dBAqjL4z641JK7B5EX
 f7IBSOD7j8onMyvRR28qG9iz2nFpnzTJ0f9NCObpD3AGlQLDF7zFTHkZzIRt0VM=
 =3kcn
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt

Merge "First batch of AT91 DT material for 3.18" from Nicolas Ferre:

- RAM controller rework for multiple controller SoCs
- shutdown controller addtion

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: sama5d3: Add shutdown controller
  ARM: at91/dt: Declare a second ram controller when relevant
  ARM: at91/dt: at91sam9: use ddrck in ramc
  ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks
This commit is contained in:
Arnd Bergmann 2014-09-05 22:24:48 +02:00
commit 046ed3cc88
5 changed files with 32 additions and 6 deletions

View File

@ -345,10 +345,14 @@ ohci_clk: ohci_clk {
};
};
ramc: ramc@ffffe200 {
ramc0: ramc@ffffe200 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffe200 0x200
0xffffe800 0x200>;
reg = <0xffffe200 0x200>;
};
ramc1: ramc@ffffe800 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffe800 0x200>;
};
pit: timer@fffffd30 {

View File

@ -96,8 +96,14 @@ aic: interrupt-controller@fffff000 {
ramc0: ramc@ffffe400 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe400 0x200
0xffffe600 0x200>;
reg = <0xffffe400 0x200>;
clocks = <&ddrck>;
clock-names = "ddrck";
};
ramc1: ramc@ffffe600 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe600 0x200>;
clocks = <&ddrck>;
clock-names = "ddrck";
};

View File

@ -87,6 +87,8 @@ aic: interrupt-controller@fffff000 {
ramc0: ramc@ffffe800 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe800 0x200>;
clocks = <&ddrck>;
clock-names = "ddrck";
};
pmc: pmc@fffffc00 {

View File

@ -95,6 +95,8 @@ aic: interrupt-controller@fffff000 {
ramc0: ramc@ffffe800 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe800 0x200>;
clocks = <&ddrck>;
clock-names = "ddrck";
};
pmc: pmc@fffffc00 {

View File

@ -402,8 +402,10 @@ dma1: dma-controller@ffffe800 {
};
ramc0: ramc@ffffea00 {
compatible = "atmel,at91sam9g45-ddramc";
compatible = "atmel,sama5d3-ddramc";
reg = <0xffffea00 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clock-names = "ddrck", "mpddr";
};
dbgu: serial@ffffee00 {
@ -1170,6 +1172,11 @@ fuse_clk: fuse_clk {
#clock-cells = <0>;
reg = <48>;
};
mpddr_clk: mpddr_clk {
#clock-cells = <0>;
reg = <49>;
};
};
};
@ -1178,6 +1185,11 @@ rstc@fffffe00 {
reg = <0xfffffe00 0x10>;
};
shutdown-controller@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
};
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;