mirror of https://gitee.com/openkylin/linux.git
Few more omap SoC changes for v4.8 merge window:
- Fix a make randconfig build error for recent SMP kexec changes - A series of clock related fixes to prepare things for moving device clkctrl register handling to drivers/clk -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXe11sAAoJEBvUPslcq6Vz/XwQAItR9F4G/DibYl6CgIgvxdZF heCFfhg/TjNnAlOdqSszAmCDxrL0cSj9/Djm7PBmcZz6T0XQWp2xviTsW/08N9LI Hcugi179a10IjOan6EASQlITRDC6S9Elkq2arMDTxkRMH8jRBGCG3Wk7H3N4084O x7XCZH2zDGDsYJp12L1iZ6DZ+aYneSmcK3WmUmAiKQTZw1fK0AfMtc95fHh2iCTJ hK0+LCbg2gUL1+GKZTIa+caLDdU+48XDpxagAnnIDiWJH+TC1DOve14I0OqzZiCB YZC/W14ulIwkTMpUNHZufcG9ZVg0G3gtvnfKISxLI8gf/X/CrbcGsVnqRmsA3P2g r3rIVpdoZ4UbHfKZnE36jR6EggX71pQ+h8M3iazb9aoraWQKOL6NanqPbf3WZO3i PGXDOwrnXqK2mjfkMWr+ERLKcLFJSnYQaeZuZF84s1TqLIvzm7ouvGfD0fcbvW9N RA/imL/FqLeuu3X6PtE0mReS+aGJ+Ov2ZpmPpemdOryys3LotYHoC8fJyD9l5GKp M5sHHEVZicFHPesYaBnjThVbM5zVHYnmb1o+Yyjizwnh52kOKJO8SrJ9+qBvJ9Bo JitY8Y2+52IVDPtpeST2METORIP2HDZF4GnQdx8EakJBok4EPfVgXUzT7M1XB7Bw RnGWoAxSVQzrzr7kSMHS =qmem -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.8/soc-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Merge "Few more omap SoC changes for v4.8 merge window" from Tony Lindgren: - Fix a make randconfig build error for recent SMP kexec changes - A series of clock related fixes to prepare things for moving device clkctrl register handling to drivers/clk * tag 'omap-for-v4.8/soc-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: AM33xx: fix module_wait_ready without clkctrl register ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIs ARM: OMAP2+: timer: change order of hwmod data handling ARM: OMAP2+: hwmod: fetch main_clk based on hwmod name ARM: OMAP2+: omap_device: create clock alias purely from DT data ARM: OMAP2+: Fix build with CONFIG_SMP and CONFIG_PM is not set
This commit is contained in:
commit
04b6d0a300
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@ -78,13 +78,16 @@ obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o
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endif
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# Power Management
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omap-4-5-pm-common = omap-mpuss-lowpower.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common)
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obj-$(CONFIG_ARCH_OMAP5) += $(omap-4-5-pm-common)
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obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
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ifeq ($(CONFIG_PM),y)
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obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
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obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
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obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
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omap-4-5-pm-common = pm44xx.o omap-mpuss-lowpower.o
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omap-4-5-pm-common += pm44xx.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common)
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obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-pm-common)
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obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-pm-common)
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@ -465,10 +465,7 @@ int clkdm_complete_init(void)
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return -EACCES;
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list_for_each_entry(clkdm, &clkdm_list, node) {
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if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
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clkdm_wakeup(clkdm);
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else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO)
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clkdm_deny_idle(clkdm);
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clkdm_deny_idle(clkdm);
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_resolve_clkdm_deps(clkdm, clkdm->wkdep_srcs);
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clkdm_clear_all_wkdeps(clkdm);
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@ -925,11 +922,20 @@ void clkdm_allow_idle_nolock(struct clockdomain *clkdm)
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if (!clkdm)
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return;
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if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) {
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pr_debug("clock: %s: automatic idle transitions cannot be enabled\n",
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clkdm->name);
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if (!WARN_ON(!clkdm->forcewake_count))
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clkdm->forcewake_count--;
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if (clkdm->forcewake_count)
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return;
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if (!clkdm->usecount && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
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clkdm_sleep_nolock(clkdm);
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if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO))
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return;
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if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING)
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return;
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}
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if (!arch_clkdm || !arch_clkdm->clkdm_allow_idle)
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return;
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@ -974,11 +980,17 @@ void clkdm_deny_idle_nolock(struct clockdomain *clkdm)
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if (!clkdm)
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return;
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if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) {
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pr_debug("clockdomain: %s: automatic idle transitions cannot be disabled\n",
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clkdm->name);
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if (clkdm->forcewake_count++)
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return;
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if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
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clkdm_wakeup_nolock(clkdm);
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if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO))
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return;
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if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING)
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return;
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}
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if (!arch_clkdm || !arch_clkdm->clkdm_deny_idle)
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return;
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@ -114,6 +114,7 @@ struct omap_hwmod;
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* @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up
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* @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact
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* @usecount: Usecount tracking
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* @forcewake_count: Usecount for forcing the domain active
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* @node: list_head to link all clockdomains together
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*
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* @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only)
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@ -138,6 +139,7 @@ struct clockdomain {
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struct clkdm_dep *wkdep_srcs;
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struct clkdm_dep *sleepdep_srcs;
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int usecount;
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int forcewake_count;
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struct list_head node;
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};
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@ -220,6 +220,9 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
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{
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int i = 0;
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if (!clkctrl_offs)
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return 0;
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omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
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MAX_MODULE_READY_TIME, i);
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@ -140,7 +140,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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mpuss_can_lose_context)
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gic_dist_disable();
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clkdm_wakeup(cpu_clkdm[1]);
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clkdm_deny_idle(cpu_clkdm[1]);
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omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
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clkdm_allow_idle(cpu_clkdm[1]);
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@ -64,7 +64,7 @@
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static void __iomem *sar_base;
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#ifdef CONFIG_SMP
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#if defined(CONFIG_PM) && defined(CONFIG_SMP)
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struct omap4_cpu_pm_info {
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struct powerdomain *pwrdm;
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@ -200,7 +200,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
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* Ensure that CPU power state is set to ON to avoid CPU
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* powerdomain transition on wfi
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*/
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clkdm_wakeup_nolock(cpu1_clkdm);
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clkdm_deny_idle_nolock(cpu1_clkdm);
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pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON);
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clkdm_allow_idle_nolock(cpu1_clkdm);
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@ -63,7 +63,22 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
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return;
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}
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rc = clk_add_alias(clk_alias, dev_name(&od->pdev->dev), clk_name, NULL);
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r = clk_get_sys(NULL, clk_name);
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if (IS_ERR(r) && of_have_populated_dt()) {
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struct of_phandle_args clkspec;
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clkspec.np = of_find_node_by_name(NULL, clk_name);
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r = of_clk_get_from_provider(&clkspec);
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rc = clk_register_clkdev(r, clk_alias,
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dev_name(&od->pdev->dev));
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} else {
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rc = clk_add_alias(clk_alias, dev_name(&od->pdev->dev),
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clk_name, NULL);
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}
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if (rc) {
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if (rc == -ENODEV || rc == -ENOMEM)
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dev_err(&od->pdev->dev,
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@ -178,6 +178,11 @@
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*/
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#define OMAP4_RST_CTRL_ST_OFFSET 4
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/*
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* Maximum length for module clock handle names
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*/
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#define MOD_CLK_MAX_NAME_LEN 32
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/**
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* struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
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* @enable_module: function to enable a module (via MODULEMODE)
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@ -200,6 +205,7 @@ struct omap_hwmod_soc_ops {
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int (*init_clkdm)(struct omap_hwmod *oh);
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void (*update_context_lost)(struct omap_hwmod *oh);
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int (*get_context_lost)(struct omap_hwmod *oh);
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int (*disable_direct_prcm)(struct omap_hwmod *oh);
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};
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/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
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@ -776,17 +782,35 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
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* @oh: struct omap_hwmod *
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*
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* Called from _init_clocks(). Populates the @oh _clk (main
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* functional clock pointer) if a main_clk is present. Returns 0 on
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* success or -EINVAL on error.
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* functional clock pointer) if a clock matching the hwmod name is found,
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* or a main_clk is present. Returns 0 on success or -EINVAL on error.
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*/
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static int _init_main_clk(struct omap_hwmod *oh)
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{
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int ret = 0;
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char name[MOD_CLK_MAX_NAME_LEN];
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struct clk *clk;
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if (!oh->main_clk)
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return 0;
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/* +7 magic comes from '_mod_ck' suffix */
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if (strlen(oh->name) + 7 > MOD_CLK_MAX_NAME_LEN)
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pr_warn("%s: warning: cropping name for %s\n", __func__,
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oh->name);
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strncpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - 7);
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strcat(name, "_mod_ck");
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clk = clk_get(NULL, name);
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if (!IS_ERR(clk)) {
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oh->_clk = clk;
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soc_ops.disable_direct_prcm(oh);
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oh->main_clk = kstrdup(name, GFP_KERNEL);
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} else {
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if (!oh->main_clk)
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return 0;
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oh->_clk = clk_get(NULL, oh->main_clk);
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}
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oh->_clk = clk_get(NULL, oh->main_clk);
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if (IS_ERR(oh->_clk)) {
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pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
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oh->name, oh->main_clk);
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@ -1678,7 +1702,6 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
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{
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struct omap_hwmod_rst_info ohri;
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int ret = -EINVAL;
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int hwsup = 0;
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if (!oh)
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return -EINVAL;
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@ -1696,7 +1719,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
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* might not be completed. The clockdomain can be set
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* in HW_AUTO only when the module become ready.
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*/
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hwsup = clkdm_in_hwsup(oh->clkdm);
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clkdm_deny_idle(oh->clkdm);
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ret = clkdm_hwmod_enable(oh->clkdm, oh);
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if (ret) {
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WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
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@ -1723,8 +1746,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
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* Set the clockdomain to HW_AUTO, assuming that the
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* previous state was HW_AUTO.
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*/
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if (hwsup)
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clkdm_allow_idle(oh->clkdm);
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clkdm_allow_idle(oh->clkdm);
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clkdm_hwmod_disable(oh->clkdm, oh);
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}
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|
@ -2078,7 +2100,6 @@ static int _enable_preprogram(struct omap_hwmod *oh)
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static int _enable(struct omap_hwmod *oh)
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{
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int r;
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int hwsup = 0;
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pr_debug("omap_hwmod: %s: enabling\n", oh->name);
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|
@ -2138,8 +2159,7 @@ static int _enable(struct omap_hwmod *oh)
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* completely the module. The clockdomain can be set
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* in HW_AUTO only when the module become ready.
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*/
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hwsup = clkdm_in_hwsup(oh->clkdm) &&
|
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!clkdm_missing_idle_reporting(oh->clkdm);
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clkdm_deny_idle(oh->clkdm);
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r = clkdm_hwmod_enable(oh->clkdm, oh);
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if (r) {
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WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
|
||||
|
@ -2159,14 +2179,10 @@ static int _enable(struct omap_hwmod *oh)
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|||
|
||||
r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
|
||||
-EINVAL;
|
||||
if (!r) {
|
||||
/*
|
||||
* Set the clockdomain to HW_AUTO only if the target is ready,
|
||||
* assuming that the previous state was HW_AUTO
|
||||
*/
|
||||
if (oh->clkdm && hwsup)
|
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clkdm_allow_idle(oh->clkdm);
|
||||
if (oh->clkdm)
|
||||
clkdm_allow_idle(oh->clkdm);
|
||||
|
||||
if (!r) {
|
||||
oh->_state = _HWMOD_STATE_ENABLED;
|
||||
|
||||
/* Access the sysconfig only if the target is ready */
|
||||
|
@ -2220,6 +2236,9 @@ static int _idle(struct omap_hwmod *oh)
|
|||
_idle_sysc(oh);
|
||||
_del_initiator_dep(oh, mpu_oh);
|
||||
|
||||
if (oh->clkdm)
|
||||
clkdm_deny_idle(oh->clkdm);
|
||||
|
||||
if (oh->flags & HWMOD_BLOCK_WFI)
|
||||
cpu_idle_poll_ctrl(false);
|
||||
if (soc_ops.disable_module)
|
||||
|
@ -2232,8 +2251,10 @@ static int _idle(struct omap_hwmod *oh)
|
|||
* transition to complete properly.
|
||||
*/
|
||||
_disable_clocks(oh);
|
||||
if (oh->clkdm)
|
||||
if (oh->clkdm) {
|
||||
clkdm_allow_idle(oh->clkdm);
|
||||
clkdm_hwmod_disable(oh->clkdm, oh);
|
||||
}
|
||||
|
||||
/* Mux pins for device idle if populated */
|
||||
if (oh->mux && oh->mux->pads_dynamic) {
|
||||
|
@ -3090,6 +3111,25 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
|
|||
oh->prcm.omap4.rstctrl_offs);
|
||||
}
|
||||
|
||||
/**
|
||||
* _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
|
||||
* @oh: struct omap_hwmod * to disable control for
|
||||
*
|
||||
* Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
|
||||
* will be using its main_clk to enable/disable the module. Returns
|
||||
* 0 if successful.
|
||||
*/
|
||||
static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
|
||||
{
|
||||
if (!oh)
|
||||
return -EINVAL;
|
||||
|
||||
oh->prcm.omap4.clkctrl_offs = 0;
|
||||
oh->prcm.omap4.modulemode = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
|
||||
* @oh: struct omap_hwmod * to deassert hardreset
|
||||
|
@ -3913,6 +3953,7 @@ void __init omap_hwmod_init(void)
|
|||
soc_ops.init_clkdm = _init_clkdm;
|
||||
soc_ops.update_context_lost = _omap4_update_context_lost;
|
||||
soc_ops.get_context_lost = _omap4_get_context_lost;
|
||||
soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
|
||||
} else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
|
||||
soc_is_am43xx()) {
|
||||
soc_ops.enable_module = _omap4_enable_module;
|
||||
|
@ -3922,6 +3963,7 @@ void __init omap_hwmod_init(void)
|
|||
soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
|
||||
soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
|
||||
soc_ops.init_clkdm = _init_clkdm;
|
||||
soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
|
||||
} else {
|
||||
WARN(1, "omap_hwmod: unknown SoC type\n");
|
||||
}
|
||||
|
|
|
@ -110,13 +110,7 @@ static void __init omap2_init_processor_devices(void)
|
|||
|
||||
int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
|
||||
{
|
||||
/* XXX The usecount test is racy */
|
||||
if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
|
||||
!(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
|
||||
clkdm_allow_idle(clkdm);
|
||||
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
|
||||
clkdm->usecount == 0)
|
||||
clkdm_sleep(clkdm);
|
||||
clkdm_allow_idle(clkdm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -222,7 +222,6 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
|
|||
* @pwrdm: struct powerdomain * to operate on
|
||||
* @curr_pwrst: current power state of @pwrdm
|
||||
* @pwrst: power state to switch to
|
||||
* @hwsup: ptr to a bool to return whether the clkdm is hardware-supervised
|
||||
*
|
||||
* Determine whether the powerdomain needs to be turned on before
|
||||
* attempting to switch power states. Called by
|
||||
|
@ -233,8 +232,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
|
|||
* "Types of sleep_switch" comment above).
|
||||
*/
|
||||
static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
|
||||
u8 curr_pwrst, u8 pwrst,
|
||||
bool *hwsup)
|
||||
u8 curr_pwrst, u8 pwrst)
|
||||
{
|
||||
u8 sleep_switch;
|
||||
|
||||
|
@ -244,8 +242,7 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
|
|||
arch_pwrdm->pwrdm_set_lowpwrstchange) {
|
||||
sleep_switch = LOWPOWERSTATE_SWITCH;
|
||||
} else {
|
||||
*hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
|
||||
clkdm_wakeup_nolock(pwrdm->pwrdm_clkdms[0]);
|
||||
clkdm_deny_idle_nolock(pwrdm->pwrdm_clkdms[0]);
|
||||
sleep_switch = FORCEWAKEUP_SWITCH;
|
||||
}
|
||||
} else {
|
||||
|
@ -259,7 +256,6 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
|
|||
* _pwrdm_restore_clkdm_state - restore the clkdm hwsup state after pwrst change
|
||||
* @pwrdm: struct powerdomain * to operate on
|
||||
* @sleep_switch: return value from _pwrdm_save_clkdm_state_and_activate()
|
||||
* @hwsup: should @pwrdm's first clockdomain be set to hardware-supervised mode?
|
||||
*
|
||||
* Restore the clockdomain state perturbed by
|
||||
* _pwrdm_save_clkdm_state_and_activate(), and call the power state
|
||||
|
@ -270,14 +266,11 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
|
|||
* software-supervised sleep. No return value.
|
||||
*/
|
||||
static void _pwrdm_restore_clkdm_state(struct powerdomain *pwrdm,
|
||||
u8 sleep_switch, bool hwsup)
|
||||
u8 sleep_switch)
|
||||
{
|
||||
switch (sleep_switch) {
|
||||
case FORCEWAKEUP_SWITCH:
|
||||
if (hwsup)
|
||||
clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]);
|
||||
else
|
||||
clkdm_sleep_nolock(pwrdm->pwrdm_clkdms[0]);
|
||||
clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]);
|
||||
break;
|
||||
case LOWPOWERSTATE_SWITCH:
|
||||
if (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE &&
|
||||
|
@ -1092,7 +1085,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
|
|||
u8 next_pwrst, sleep_switch;
|
||||
int curr_pwrst;
|
||||
int ret = 0;
|
||||
bool hwsup = false;
|
||||
|
||||
if (!pwrdm || IS_ERR(pwrdm))
|
||||
return -EINVAL;
|
||||
|
@ -1116,14 +1108,14 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
|
|||
goto osps_out;
|
||||
|
||||
sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst,
|
||||
pwrst, &hwsup);
|
||||
pwrst);
|
||||
|
||||
ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
|
||||
if (ret)
|
||||
pr_err("%s: unable to set power state of powerdomain: %s\n",
|
||||
__func__, pwrdm->name);
|
||||
|
||||
_pwrdm_restore_clkdm_state(pwrdm, sleep_switch, hwsup);
|
||||
_pwrdm_restore_clkdm_state(pwrdm, sleep_switch);
|
||||
|
||||
osps_out:
|
||||
pwrdm_unlock(pwrdm);
|
||||
|
|
|
@ -289,6 +289,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
|||
if (!timer->io_base)
|
||||
return -ENXIO;
|
||||
|
||||
omap_hwmod_setup_one(oh_name);
|
||||
|
||||
/* After the dmtimer is using hwmod these clocks won't be needed */
|
||||
timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
|
||||
if (IS_ERR(timer->fclk))
|
||||
|
@ -303,7 +305,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
|||
|
||||
clk_put(src);
|
||||
|
||||
omap_hwmod_setup_one(oh_name);
|
||||
omap_hwmod_enable(oh);
|
||||
__omap_dm_timer_init_regs(timer);
|
||||
|
||||
|
|
Loading…
Reference in New Issue