mirror of https://gitee.com/openkylin/linux.git
Second Round of Renesas ARM64 Based SoC DT Updates for v4.16
* Add usb3_phy node to r8a7795 (R-Car H3) and r8a7796 (R-Car M3-W) SoCs, and enable usb3_peri0 on salvator boards * Allow DTBs of boards of r8a7795 (R-Car H3) and r8a7796 SoCs to build without any warnings when compiled with W=1 using gcc-linaro-5.4.1-2017.05 - Move nodes which have no reg property out of bus, they don't belong there - Add reg properties to dummy pciec[01] nodes - Also sort sub-nodes of root node to allow for easier maintenance * Add Add EthernetAVB PHY reset to r8a7795 (R-Car H3) and r8a7796 SoCs boards. Geert Uytterhoeven says "... add properties to describe the EthernetAVB PHY reset topology to the common Salvator-X/XS and ULCB DTS files, which solves two issues: 1. On Salvator-XS, the enable pin of the regulator providing PHY power is connected to PRESETn, and PSCI powers down the SoC during system suspend. Hence a PHY reset is needed to restore network functionality after system resume. 2. Linux should not rely on the boot loader having reset the PHY, but should reset the PHY during driver probe." -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlo813MACgkQ189kaWo3 T758mg//Zk+Xd+T0i1baVHduBM5DkmwchYXHzRnG2/1fGoLhOt5FJn1uJ4M1Hxog q1b3c//PvYk7OIW36jRy/LS0tHYXkizVviSHlUrmNNuXP+EhhKFQGnmxuRNKjzi8 F8Kdi1xWs/R9a9uFczwDobXPg4spguk5qgEnbVVkmSuw3uN8ChPOVaGBPraeNzai rIqhNkv8k2Lc3ReheRqgH0XiQBMi4/nvSbEFjOFbn4N7oiVJ6MqUBauzK4J+I2AB 5Y3uuE83nQhbNXwyit9AO0iix8Aob3XMCvpP5kEz3mgBJfjFMMDwIZ9W2pAWIG6G g9axnPXloj8bXYQd0kppWlJihQu1Ufhn4z14UW7XCmQOHkXWwLKflYMEHORVx4TP IAxjLHFlWUiJ9yvPNvE5PPjNjiovzKsZbjxR9r9Jy9oLgPcxgQk94hNbB2K1DTbK tlxi75yyrVHhJaEZQk6Ev2tBAYHBB04uPrGVSdThmzssAInqd9lLyOrMtMOP/5ti ZXOl8h87uK/zigBloCtfC/+GXUUIeOoZXC31m/nEhhvi2ST3QrXAoIcVCrzO25AB f98vaGMGK2nmcNQB80oOdttFm/f0Jv131BokMwJzMInnM5DQsOJM8HAPZTaL0H3I G3OaE6LJ/toKlKe6Eyb850WT6Xhv6hv/HbeiLAcip08w60GHyRM= =L57U -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Second Round of Renesas ARM64 Based SoC DT Updates for v4.16 * Add usb3_phy node to r8a7795 (R-Car H3) and r8a7796 (R-Car M3-W) SoCs, and enable usb3_peri0 on salvator boards * Allow DTBs of boards of r8a7795 (R-Car H3) and r8a7796 SoCs to build without any warnings when compiled with W=1 using gcc-linaro-5.4.1-2017.05 - Move nodes which have no reg property out of bus, they don't belong there - Add reg properties to dummy pciec[01] nodes - Also sort sub-nodes of root node to allow for easier maintenance * Add Add EthernetAVB PHY reset to r8a7795 (R-Car H3) and r8a7796 SoCs boards. Geert Uytterhoeven says "... add properties to describe the EthernetAVB PHY reset topology to the common Salvator-X/XS and ULCB DTS files, which solves two issues: 1. On Salvator-XS, the enable pin of the regulator providing PHY power is connected to PRESETn, and PSCI powers down the SoC during system suspend. Hence a PHY reset is needed to restore network functionality after system resume. 2. Linux should not rely on the boot loader having reset the PHY, but should reset the PHY during driver probe." * tag 'renesas-arm64-dt2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: renesas: salvator-common: enable usb3_peri0 arm64: dts: renesas: salvator-common: enable usb3_phy0 node arm64: dts: renesas: r8a7796: add usb3_phy node arm64: dts: renesas: r8a7795: add usb3_phy node arm64: dts: renesas: r8a7796: add reg properties to pciec[01] nodes arm64: dts: renesas: r8a7796: move nodes which have no reg property out of bus arm64: dts: renesas: r8a7796: sort subnodes of root node alphabetically arm64: dts: renesas: r8a7795: sort subnodes of root node alphabetically arm64: dts: renesas: ulcb: Add EthernetAVB PHY reset arm64: dts: renesas: salvator-common: Add EthernetAVB PHY reset arm64: dts: renesas: r8a7795: Move nodes which have no reg property out of bus Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
052f6026cc
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@ -30,11 +30,6 @@ aliases {
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i2c7 = &i2c_dvfs;
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};
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2";
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method = "smc";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -184,6 +179,35 @@ pcie_bus_clk: pcie_bus {
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clock-frequency = <0>;
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};
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pmu_a57 {
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compatible = "arm,cortex-a57-pmu";
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interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a57_0>,
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<&a57_1>,
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<&a57_2>,
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<&a57_3>;
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};
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pmu_a53 {
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compatible = "arm,cortex-a53-pmu";
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interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a53_0>,
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<&a53_1>,
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<&a53_2>,
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<&a53_3>;
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};
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2";
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method = "smc";
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};
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soc: soc {
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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@ -338,42 +362,6 @@ gpio7: gpio@e6055800 {
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resets = <&cpg 905>;
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};
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pmu_a57 {
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compatible = "arm,cortex-a57-pmu";
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a57_0>,
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<&a57_1>,
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<&a57_2>,
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<&a57_3>;
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};
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pmu_a53 {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a53_0>,
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<&a53_1>,
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<&a53_2>,
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<&a53_3>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a7795-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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@ -1643,6 +1631,19 @@ sata: sata@ee300000 {
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iommus = <&ipmmu_hc 2>;
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};
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usb3_phy0: usb-phy@e65ee000 {
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compatible = "renesas,r8a7795-usb3-phy",
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"renesas,rcar-gen3-usb3-phy";
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reg = <0 0xe65ee000 0 0x90>;
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clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
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<&usb_extal_clk>;
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clock-names = "usb3-if", "usb3s_clk", "usb_extal";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 328>;
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#phy-cells = <0>;
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status = "disabled";
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};
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xhci0: usb@ee000000 {
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compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
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reg = <0 0xee000000 0 0xc00>;
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@ -2331,6 +2332,23 @@ tsc: thermal@e6198000 {
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#thermal-sensor-cells = <1>;
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status = "okay";
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts-extended = <&gic GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_LOW)>,
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<&gic GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_LOW)>,
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<&gic GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_LOW)>,
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<&gic GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_LOW)>;
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};
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thermal-zones {
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sensor_thermal1: sensor-thermal1 {
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|
@ -2375,5 +2393,17 @@ sensor3_crit: sensor3-crit {
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};
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};
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};
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/* External USB clocks - can be overridden by the board */
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usb3s0_clk: usb3s0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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usb_extal_clk: usb_extal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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};
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|
|
|
@ -30,9 +30,34 @@ aliases {
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i2c7 = &i2c_dvfs;
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};
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||||
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2";
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method = "smc";
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/*
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* The external audio clocks are configured as 0 Hz fixed frequency
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* clocks by default.
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* Boards that provide audio clocks should override them.
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*/
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audio_clk_a: audio_clk_a {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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audio_clk_b: audio_clk_b {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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audio_clk_c: audio_clk_c {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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/* External CAN clock - to be overridden by boards that provide it */
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can_clk: can {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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cpus {
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@ -122,34 +147,32 @@ extalr_clk: extalr {
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clock-frequency = <0>;
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};
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/*
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* The external audio clocks are configured as 0 Hz fixed frequency
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* clocks by default.
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* Boards that provide audio clocks should override them.
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*/
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audio_clk_a: audio_clk_a {
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/* External PCIe clock - can be overridden by the board */
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pcie_bus_clk: pcie_bus {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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audio_clk_b: audio_clk_b {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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pmu_a57 {
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compatible = "arm,cortex-a57-pmu";
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interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a57_0>, <&a57_1>;
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};
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audio_clk_c: audio_clk_c {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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pmu_a53 {
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compatible = "arm,cortex-a53-pmu";
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interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
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};
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/* External CAN clock - to be overridden by boards that provide it */
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can_clk: can {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2";
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method = "smc";
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};
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/* External SCIF clock - to be overridden by boards that provide it */
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|
@ -159,13 +182,6 @@ scif_clk: scif {
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clock-frequency = <0>;
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};
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/* External PCIe clock - can be overridden by the board */
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pcie_bus_clk: pcie_bus {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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|
@ -190,18 +206,6 @@ gic: interrupt-controller@f1010000 {
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resets = <&cpg 408>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14
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||||
(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11
|
||||
(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10
|
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(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
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};
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wdt0: watchdog@e6020000 {
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compatible = "renesas,r8a7796-wdt",
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"renesas,rcar-gen3-wdt";
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|
@ -337,26 +341,6 @@ pfc: pin-controller@e6060000 {
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|||
reg = <0 0xe6060000 0 0x50c>;
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||||
};
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||||
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||||
pmu_a57 {
|
||||
compatible = "arm,cortex-a57-pmu";
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&a57_0>,
|
||||
<&a57_1>;
|
||||
};
|
||||
|
||||
pmu_a53 {
|
||||
compatible = "arm,cortex-a53-pmu";
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&a53_0>,
|
||||
<&a53_1>,
|
||||
<&a53_2>,
|
||||
<&a53_3>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
|
@ -1419,6 +1403,19 @@ hsusb: usb@e6590000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3_phy0: usb-phy@e65ee000 {
|
||||
compatible = "renesas,r8a7796-usb3-phy",
|
||||
"renesas,rcar-gen3-usb3-phy";
|
||||
reg = <0 0xe65ee000 0 0x90>;
|
||||
clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
|
||||
<&usb_extal_clk>;
|
||||
clock-names = "usb3-if", "usb3s_clk", "usb_extal";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 328>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xhci0: usb@ee000000 {
|
||||
compatible = "renesas,xhci-r8a7796",
|
||||
"renesas,rcar-gen3-xhci";
|
||||
|
@ -1577,50 +1574,6 @@ tsc: thermal@e6198000 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
sensor_thermal1: sensor-thermal1 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 0>;
|
||||
|
||||
trips {
|
||||
sensor1_crit: sensor1-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal2: sensor-thermal2 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 1>;
|
||||
|
||||
trips {
|
||||
sensor2_crit: sensor2-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal3: sensor-thermal3 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 2>;
|
||||
|
||||
trips {
|
||||
sensor3_crit: sensor3-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rcar_sound: sound@ec500000 {
|
||||
/*
|
||||
* #sound-dai-cells is required
|
||||
|
@ -1818,10 +1771,12 @@ ssi9: ssi-9 {
|
|||
};
|
||||
|
||||
pciec0: pcie@fe000000 {
|
||||
reg = <0 0xfe000000 0 0x80000>;
|
||||
/* placeholder */
|
||||
};
|
||||
|
||||
pciec1: pcie@ee800000 {
|
||||
reg = <0 0xee800000 0 0x80000>;
|
||||
/* placeholder */
|
||||
};
|
||||
|
||||
|
@ -2027,4 +1982,69 @@ imr-lx4@fe870000 {
|
|||
resets = <&cpg 822>;
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
sensor_thermal1: sensor-thermal1 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 0>;
|
||||
|
||||
trips {
|
||||
sensor1_crit: sensor1-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal2: sensor-thermal2 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 1>;
|
||||
|
||||
trips {
|
||||
sensor2_crit: sensor2-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal3: sensor-thermal3 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 2>;
|
||||
|
||||
trips {
|
||||
sensor3_crit: sensor3-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* External USB clocks - can be overridden by the board */
|
||||
usb3s0_clk: usb3s0 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
usb_extal_clk: usb_extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -264,6 +264,7 @@ phy0: ethernet-phy@0 {
|
|||
reg = <0>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -647,6 +648,10 @@ &ssi1 {
|
|||
shared-pin;
|
||||
};
|
||||
|
||||
&usb_extal_clk {
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
||||
&usb2_phy0 {
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -662,6 +667,21 @@ &usb2_phy1 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_peri0 {
|
||||
phys = <&usb3_phy0>;
|
||||
phy-names = "usb";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3s0_clk {
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
&wdt0 {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
|
|
|
@ -154,6 +154,7 @@ phy0: ethernet-phy@0 {
|
|||
reg = <0>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue