mirror of https://gitee.com/openkylin/linux.git
ARM: OMAP5: Add minimal support for OMAP5430 SOC
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and with an integrated L2 cache controller. OMAP5432 is another variant of OMAP5430, with a memory controller supporting DDR3 and SATA. Patch includes: - The machine specific headers and sources updates. - Platform header updates. - Minimum initialisation support for serial. - IO table init Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
R Sricharan
Santosh Shilimkar
parent
b13e80a8bf
commit
05e152c76a
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@ -17,6 +17,7 @@ obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
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obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
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obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
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obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
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obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common)
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ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
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obj-y += mcbsp.o
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@ -29,8 +30,10 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o
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obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
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obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o
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obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o
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omap-4-5-common = omap4-common.o omap-wakeupgen.o \
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sleep44xx.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common)
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obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common)
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
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@ -70,6 +73,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
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obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
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obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o
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obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o
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obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o
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obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o
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obj-$(CONFIG_PM_DEBUG) += pm-debug.o
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obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
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@ -85,14 +89,16 @@ endif
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endif
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# PRCM
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omap-prcm-4-5-common = prcm.o cminst44xx.o cm44xx.o \
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prcm_mpu44xx.o prminst44xx.o \
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vc44xx_data.o vp44xx_data.o
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obj-y += prm_common.o
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obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
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obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
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obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += prcm.o cminst44xx.o cm44xx.o
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obj-$(CONFIG_ARCH_OMAP4) += prcm_mpu44xx.o prminst44xx.o
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obj-$(CONFIG_ARCH_OMAP4) += vc44xx_data.o vp44xx_data.o prm44xx.o
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obj-$(CONFIG_SOC_AM33XX) += prcm.o prm33xx.o cm33xx.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) prm44xx.o
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obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
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# OMAP voltage domains
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voltagedomain-common := voltage.o vc.o vp.o
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@ -104,6 +110,7 @@ obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common)
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obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o
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obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common)
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obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o
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obj-$(CONFIG_SOC_OMAP5) += $(voltagedomain-common)
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# OMAP powerdomain framework
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powerdomain-common += powerdomain.o powerdomain-common.o
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@ -121,6 +128,8 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
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obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common)
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obj-$(CONFIG_SOC_AM33XX) += powerdomain33xx.o
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obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o
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obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common)
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obj-$(CONFIG_SOC_OMAP5) += powerdomain44xx.o
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# PRCM clockdomain control
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clockdomain-common += clockdomain.o
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@ -139,6 +148,8 @@ obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o
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obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common)
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obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o
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obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o
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obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common)
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obj-$(CONFIG_SOC_OMAP5) += clockdomain44xx.o
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# Clock framework
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obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
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@ -157,6 +168,8 @@ obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o
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obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o
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obj-$(CONFIG_SOC_AM33XX) += $(clock-common) dpll3xxx.o
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obj-$(CONFIG_SOC_OMAP5) += $(clock-common)
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obj-$(CONFIG_SOC_OMAP5) += dpll3xxx.o dpll44xx.o
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# OMAP2 clock rate set data (old "OPP" data)
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obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
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@ -178,3 +178,27 @@ void __init omap4_map_io(void)
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}
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#endif
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#if defined(CONFIG_SOC_OMAP5)
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static struct omap_globals omap5_globals = {
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.class = OMAP54XX_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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.ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
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.cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
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.prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE),
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};
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void __init omap2_set_globals_5xxx(void)
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{
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omap2_set_globals_tap(&omap5_globals);
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omap2_set_globals_control(&omap5_globals);
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omap2_set_globals_prcm(&omap5_globals);
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}
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void __init omap5_map_io(void)
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{
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omap5_map_common_io();
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}
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#endif
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@ -115,6 +115,14 @@ static inline int omap_mux_late_init(void)
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}
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#endif
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#ifdef CONFIG_SOC_OMAP5
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extern void omap5_map_common_io(void);
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#else
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static inline void omap5_map_common_io(void)
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{
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}
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#endif
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extern void omap2_init_common_infrastructure(void);
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extern struct sys_timer omap2_timer;
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@ -134,6 +142,7 @@ void am35xx_init_early(void);
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void ti81xx_init_early(void);
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void am33xx_init_early(void);
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void omap4430_init_early(void);
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void omap5_init_early(void);
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void omap3_init_late(void); /* Do not use this one */
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void omap4430_init_late(void);
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void omap2420_init_late(void);
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@ -169,6 +178,7 @@ void omap2_set_globals_242x(void);
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void omap2_set_globals_243x(void);
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void omap2_set_globals_3xxx(void);
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void omap2_set_globals_443x(void);
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void omap2_set_globals_5xxx(void);
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void omap2_set_globals_ti81xx(void);
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void omap2_set_globals_am33xx(void);
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@ -188,6 +198,7 @@ void omap243x_map_io(void);
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void omap3_map_io(void);
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void am33xx_map_io(void);
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void omap4_map_io(void);
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void omap5_map_io(void);
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void ti81xx_map_io(void);
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void omap_barriers_init(void);
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@ -60,12 +60,12 @@ omap_uart_lsr: .word 0
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beq 23f @ configure OMAP2UART3
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cmp \rp, #OMAP3UART3 @ only on 34xx
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beq 33f @ configure OMAP3UART3
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cmp \rp, #OMAP4UART3 @ only on 44xx
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beq 43f @ configure OMAP4UART3
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cmp \rp, #OMAP4UART3 @ only on 44xx/54xx
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beq 43f @ configure OMAP4/5UART3
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cmp \rp, #OMAP3UART4 @ only on 36xx
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beq 34f @ configure OMAP3UART4
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cmp \rp, #OMAP4UART4 @ only on 44xx
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beq 44f @ configure OMAP4UART4
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cmp \rp, #OMAP4UART4 @ only on 44xx/54xx
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beq 44f @ configure OMAP4/5UART4
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cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
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beq 81f @ configure UART1
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cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
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@ -233,6 +233,35 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
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};
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#endif
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#ifdef CONFIG_SOC_OMAP5
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static struct map_desc omap54xx_io_desc[] __initdata = {
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{
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.virtual = L3_54XX_VIRT,
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.pfn = __phys_to_pfn(L3_54XX_PHYS),
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.length = L3_54XX_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = L4_54XX_VIRT,
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.pfn = __phys_to_pfn(L4_54XX_PHYS),
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.length = L4_54XX_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = L4_WK_54XX_VIRT,
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.pfn = __phys_to_pfn(L4_WK_54XX_PHYS),
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.length = L4_WK_54XX_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = L4_PER_54XX_VIRT,
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.pfn = __phys_to_pfn(L4_PER_54XX_PHYS),
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.length = L4_PER_54XX_SIZE,
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.type = MT_DEVICE,
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},
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};
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#endif
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#ifdef CONFIG_SOC_OMAP2420
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void __init omap242x_map_common_io(void)
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{
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@ -278,6 +307,12 @@ void __init omap44xx_map_common_io(void)
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}
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#endif
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#ifdef CONFIG_SOC_OMAP5
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void __init omap5_map_common_io(void)
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{
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iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
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}
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#endif
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/*
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* omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
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*
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@ -513,6 +548,15 @@ void __init omap4430_init_late(void)
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}
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#endif
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#ifdef CONFIG_SOC_OMAP5
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void __init omap5_init_early(void)
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{
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omap2_set_globals_5xxx();
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omap5xxx_check_revision();
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omap_common_init_early();
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}
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#endif
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void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
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struct omap_sdrc_params *sdrc_cs1)
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{
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@ -1,6 +1,14 @@
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/*
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* IO mappings for OMAP2+
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*
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* IO definitions for TI OMAP processors and boards
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*
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* Copied from arch/arm/mach-sa1100/include/mach/io.h
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* Copyright (C) 1997-1999 Russell King
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*
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* Copyright (C) 2009-2012 Texas Instruments
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* Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -166,4 +174,23 @@
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/* 0x49000000 --> 0xfb000000 */
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#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_ABE_44XX_SIZE SZ_1M
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/*
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* ----------------------------------------------------------------------------
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* Omap5 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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#define L3_54XX_PHYS L3_54XX_BASE /* 0x44000000 --> 0xf8000000 */
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#define L3_54XX_VIRT (L3_54XX_PHYS + OMAP4_L3_IO_OFFSET)
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#define L3_54XX_SIZE SZ_1M
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#define L4_54XX_PHYS L4_54XX_BASE /* 0x4a000000 --> 0xfc000000 */
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#define L4_54XX_VIRT (L4_54XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_54XX_SIZE SZ_4M
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#define L4_WK_54XX_PHYS L4_WK_54XX_BASE /* 0x4ae00000 --> 0xfce00000 */
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#define L4_WK_54XX_VIRT (L4_WK_54XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_WK_54XX_SIZE SZ_2M
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#define L4_PER_54XX_PHYS L4_PER_54XX_BASE /* 0x48000000 --> 0xfa000000 */
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#define L4_PER_54XX_VIRT (L4_PER_54XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_PER_54XX_SIZE SZ_4M
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@ -3619,7 +3619,7 @@ void __init omap_hwmod_init(void)
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soc_ops.assert_hardreset = _omap2_assert_hardreset;
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soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
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} else if (cpu_is_omap44xx()) {
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} else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
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soc_ops.enable_module = _omap4_enable_module;
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soc_ops.disable_module = _omap4_disable_module;
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soc_ops.wait_target_ready = _omap4_wait_target_ready;
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@ -416,7 +416,7 @@ extern void __iomem *cm_base;
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extern void __iomem *cm2_base;
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extern void __iomem *prcm_mpu_base;
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_OMAP5)
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
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extern void omap_prm_base_init(void);
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extern void omap_cm_base_init(void);
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#else
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@ -160,7 +160,7 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
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if (omap2_globals->prcm_mpu)
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prcm_mpu_base = omap2_globals->prcm_mpu;
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if (cpu_is_omap44xx()) {
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if (cpu_is_omap44xx() || soc_is_omap54xx()) {
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omap_prm_base_init();
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omap_cm_base_init();
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}
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@ -288,5 +288,6 @@
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#include <plat/omap44xx.h>
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#include <plat/ti81xx.h>
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#include <plat/am33xx.h>
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#include <plat/omap54xx.h>
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#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
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@ -99,4 +99,13 @@
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# endif
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#endif
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#ifdef CONFIG_SOC_OMAP5
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# ifdef OMAP_NAME
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# undef MULTI_OMAP2
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# define MULTI_OMAP2
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# else
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# define OMAP_NAME omap5
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# endif
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#endif
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#endif /* __PLAT_OMAP_MULTI_H */
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@ -0,0 +1,32 @@
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/*:
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* Address mappings and base address for OMAP5 interconnects
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* and peripherals.
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*
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* Copyright (C) 2012 Texas Instruments
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* Sricharan <r.sricharan@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_SOC_OMAP54XX_H
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#define __ASM_SOC_OMAP54XX_H
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/*
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* Please place only base defines here and put the rest in device
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* specific headers.
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*/
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#define L4_54XX_BASE 0x4a000000
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#define L4_WK_54XX_BASE 0x4ae00000
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#define L4_PER_54XX_BASE 0x48000000
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#define L3_54XX_BASE 0x44000000
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#define OMAP54XX_32KSYNCT_BASE 0x4ae04000
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#define OMAP54XX_CM_CORE_AON_BASE 0x4a004000
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#define OMAP54XX_CM_CORE_BASE 0x4a008000
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#define OMAP54XX_PRM_BASE 0x4ae06000
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#define OMAP54XX_PRCM_MPU_BASE 0x48243000
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#define OMAP54XX_SCM_BASE 0x4a002000
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||||
#define OMAP54XX_CTRL_BASE 0x4a002800
|
||||
|
||||
#endif /* __ASM_SOC_OMAP555554XX_H */
|
||||
|
|
@ -63,6 +63,14 @@
|
|||
/* AM33XX serial port */
|
||||
#define AM33XX_UART1_BASE 0x44E09000
|
||||
|
||||
/* OMAP5 serial ports */
|
||||
#define OMAP5_UART1_BASE OMAP2_UART1_BASE
|
||||
#define OMAP5_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP5_UART3_BASE OMAP4_UART3_BASE
|
||||
#define OMAP5_UART4_BASE OMAP4_UART4_BASE
|
||||
#define OMAP5_UART5_BASE 0x48066000
|
||||
#define OMAP5_UART6_BASE 0x48068000
|
||||
|
||||
/* External port on Zoom2/3 */
|
||||
#define ZOOM_UART_BASE 0x10000000
|
||||
#define ZOOM_UART_VIRT 0xfa400000
|
||||
|
|
@ -97,6 +105,8 @@
|
|||
#define TI81XXUART2 82
|
||||
#define TI81XXUART3 83
|
||||
#define AM33XXUART1 84
|
||||
#define OMAP5UART3 OMAP4UART3
|
||||
#define OMAP5UART4 OMAP4UART4
|
||||
#define ZOOM_UART 95 /* Only on zoom2/3 */
|
||||
|
||||
/* This is only used by 8250.c for omap1510 */
|
||||
|
|
|
|||
|
|
@ -95,6 +95,9 @@ static inline void flush(void)
|
|||
_DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \
|
||||
OMAP4UART##p)
|
||||
|
||||
#define DEBUG_LL_OMAP5(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \
|
||||
OMAP5UART##p)
|
||||
/* Zoom2/3 shift is different for UART1 and external port */
|
||||
#define DEBUG_LL_ZOOM(mach) \
|
||||
_DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
|
||||
|
|
@ -177,6 +180,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
|
|||
DEBUG_LL_OMAP4(3, omap_4430sdp);
|
||||
DEBUG_LL_OMAP4(3, omap4_panda);
|
||||
|
||||
/* omap5 based boards using UART3 */
|
||||
DEBUG_LL_OMAP5(3, omap5_sevm);
|
||||
|
||||
/* zoom2/3 external uart */
|
||||
DEBUG_LL_ZOOM(omap_zoom2);
|
||||
DEBUG_LL_ZOOM(omap_zoom3);
|
||||
|
|
|
|||
|
|
@ -6,8 +6,8 @@
|
|||
* Copyright (C) 2005 Nokia Corporation
|
||||
* Written by Tony Lindgren <tony@atomide.com>
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments
|
||||
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
* Copyright (C) 2009-2012 Texas Instruments
|
||||
* Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
|
@ -44,6 +44,7 @@
|
|||
#else
|
||||
#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
|
||||
#endif
|
||||
#define OMAP5_SRAM_PA 0x40300000
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2PLUS)
|
||||
#define SRAM_BOOTLOADER_SZ 0x00
|
||||
|
|
@ -118,6 +119,9 @@ static void __init omap_detect_sram(void)
|
|||
} else if (cpu_is_omap44xx()) {
|
||||
omap_sram_start = OMAP4_SRAM_PUB_PA;
|
||||
omap_sram_size = 0xa000; /* 40K */
|
||||
} else if (soc_is_omap54xx()) {
|
||||
omap_sram_start = OMAP5_SRAM_PA;
|
||||
omap_sram_size = SZ_128K; /* 128KB */
|
||||
} else {
|
||||
omap_sram_start = OMAP2_SRAM_PUB_PA;
|
||||
omap_sram_size = 0x800; /* 2K */
|
||||
|
|
@ -132,6 +136,9 @@ static void __init omap_detect_sram(void)
|
|||
} else if (cpu_is_omap44xx()) {
|
||||
omap_sram_start = OMAP4_SRAM_PA;
|
||||
omap_sram_size = 0xe000; /* 56K */
|
||||
} else if (soc_is_omap54xx()) {
|
||||
omap_sram_start = OMAP5_SRAM_PA;
|
||||
omap_sram_size = SZ_128K; /* 128KB */
|
||||
} else {
|
||||
omap_sram_start = OMAP2_SRAM_PA;
|
||||
if (cpu_is_omap242x())
|
||||
|
|
|
|||
Loading…
Reference in New Issue