mirror of https://gitee.com/openkylin/linux.git
ARM: DRA7: hwmod_data: Add mailbox hwmod data
Add the hwmod data for the 13 instances of the system mailbox IP in DRA7 SoC. The patch is needed for performing a soft-reset while configuring the respective mailbox instance, otherwise is a non-essential change for functionality. The modules are smart idled on reset, and the IP module mode is hardware controlled. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Suman Anna
Tony Lindgren
parent
38baefb33f
commit
067395d49c
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@ -938,6 +938,194 @@ static struct omap_hwmod dra7xx_i2c5_hwmod = {
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.dev_attr = &i2c_dev_attr,
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};
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/*
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* 'mailbox' class
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*
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*/
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static struct omap_hwmod_class_sysconfig dra7xx_mailbox_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class dra7xx_mailbox_hwmod_class = {
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.name = "mailbox",
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.sysc = &dra7xx_mailbox_sysc,
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};
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/* mailbox1 */
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static struct omap_hwmod dra7xx_mailbox1_hwmod = {
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.name = "mailbox1",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX1_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX1_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox2 */
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static struct omap_hwmod dra7xx_mailbox2_hwmod = {
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.name = "mailbox2",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX2_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX2_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox3 */
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static struct omap_hwmod dra7xx_mailbox3_hwmod = {
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.name = "mailbox3",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX3_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX3_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox4 */
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static struct omap_hwmod dra7xx_mailbox4_hwmod = {
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.name = "mailbox4",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX4_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX4_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox5 */
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static struct omap_hwmod dra7xx_mailbox5_hwmod = {
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.name = "mailbox5",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX5_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX5_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox6 */
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static struct omap_hwmod dra7xx_mailbox6_hwmod = {
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.name = "mailbox6",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX6_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX6_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox7 */
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static struct omap_hwmod dra7xx_mailbox7_hwmod = {
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.name = "mailbox7",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX7_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX7_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox8 */
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static struct omap_hwmod dra7xx_mailbox8_hwmod = {
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.name = "mailbox8",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX8_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX8_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox9 */
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static struct omap_hwmod dra7xx_mailbox9_hwmod = {
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.name = "mailbox9",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX9_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX9_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox10 */
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static struct omap_hwmod dra7xx_mailbox10_hwmod = {
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.name = "mailbox10",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX10_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX10_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox11 */
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static struct omap_hwmod dra7xx_mailbox11_hwmod = {
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.name = "mailbox11",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX11_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX11_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox12 */
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static struct omap_hwmod dra7xx_mailbox12_hwmod = {
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.name = "mailbox12",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX12_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX12_CONTEXT_OFFSET,
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},
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},
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};
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/* mailbox13 */
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static struct omap_hwmod dra7xx_mailbox13_hwmod = {
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.name = "mailbox13",
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.class = &dra7xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX13_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_MAILBOX13_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'mcspi' class
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*
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@ -2246,6 +2434,110 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__i2c5 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> mailbox1 */
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static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mailbox1 = {
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.master = &dra7xx_l4_cfg_hwmod,
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.slave = &dra7xx_mailbox1_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox2 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox2 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox2_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox3 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox3 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox3_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox4 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox4 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox4_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox5 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox5 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox5_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox6 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox6 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox6_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox7 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox7 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox7_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox8 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox8 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox8_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox9 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox9 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox9_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox10 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox10 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox10_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox11 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox11 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox11_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox12 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox12 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox12_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per3 -> mailbox13 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox13 = {
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.master = &dra7xx_l4_per3_hwmod,
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.slave = &dra7xx_mailbox13_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per1 -> mcspi1 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per1__mcspi1 = {
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.master = &dra7xx_l4_per1_hwmod,
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@ -2662,6 +2954,19 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
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&dra7xx_l4_per1__i2c3,
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&dra7xx_l4_per1__i2c4,
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&dra7xx_l4_per1__i2c5,
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&dra7xx_l4_cfg__mailbox1,
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&dra7xx_l4_per3__mailbox2,
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&dra7xx_l4_per3__mailbox3,
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&dra7xx_l4_per3__mailbox4,
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&dra7xx_l4_per3__mailbox5,
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&dra7xx_l4_per3__mailbox6,
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&dra7xx_l4_per3__mailbox7,
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&dra7xx_l4_per3__mailbox8,
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&dra7xx_l4_per3__mailbox9,
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&dra7xx_l4_per3__mailbox10,
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&dra7xx_l4_per3__mailbox11,
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&dra7xx_l4_per3__mailbox12,
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&dra7xx_l4_per3__mailbox13,
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&dra7xx_l4_per1__mcspi1,
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&dra7xx_l4_per1__mcspi2,
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&dra7xx_l4_per1__mcspi3,
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