drm/omap: add field for PLL type

DSS uses two types of PLLs, type A (DSI & Video) and type B (HDMI). The
two types behave slightly differently, but we don't have the type of the
PLL available anywhere for the driver.

This patch adds an enum for the PLL type and a field in the PLL's HW
data to store it.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Tomi Valkeinen 2016-05-18 10:48:44 +03:00
parent b5d8c757a6
commit 06ede3dd96
4 changed files with 19 additions and 0 deletions

View File

@ -5147,6 +5147,8 @@ static const struct dss_pll_ops dsi_pll_ops = {
}; };
static const struct dss_pll_hw dss_omap3_dsi_pll_hw = { static const struct dss_pll_hw dss_omap3_dsi_pll_hw = {
.type = DSS_PLL_TYPE_A,
.n_max = (1 << 7) - 1, .n_max = (1 << 7) - 1,
.m_max = (1 << 11) - 1, .m_max = (1 << 11) - 1,
.mX_max = (1 << 4) - 1, .mX_max = (1 << 4) - 1,
@ -5172,6 +5174,8 @@ static const struct dss_pll_hw dss_omap3_dsi_pll_hw = {
}; };
static const struct dss_pll_hw dss_omap4_dsi_pll_hw = { static const struct dss_pll_hw dss_omap4_dsi_pll_hw = {
.type = DSS_PLL_TYPE_A,
.n_max = (1 << 8) - 1, .n_max = (1 << 8) - 1,
.m_max = (1 << 12) - 1, .m_max = (1 << 12) - 1,
.mX_max = (1 << 5) - 1, .mX_max = (1 << 5) - 1,
@ -5197,6 +5201,8 @@ static const struct dss_pll_hw dss_omap4_dsi_pll_hw = {
}; };
static const struct dss_pll_hw dss_omap5_dsi_pll_hw = { static const struct dss_pll_hw dss_omap5_dsi_pll_hw = {
.type = DSS_PLL_TYPE_A,
.n_max = (1 << 8) - 1, .n_max = (1 << 8) - 1,
.m_max = (1 << 12) - 1, .m_max = (1 << 12) - 1,
.mX_max = (1 << 5) - 1, .mX_max = (1 << 5) - 1,

View File

@ -128,6 +128,11 @@ struct dss_pll;
#define DSS_PLL_MAX_HSDIVS 4 #define DSS_PLL_MAX_HSDIVS 4
enum dss_pll_type {
DSS_PLL_TYPE_A,
DSS_PLL_TYPE_B,
};
/* /*
* Type-A PLLs: clkout[]/mX[] refer to hsdiv outputs m4, m5, m6, m7. * Type-A PLLs: clkout[]/mX[] refer to hsdiv outputs m4, m5, m6, m7.
* Type-B PLLs: clkout[0] refers to m2. * Type-B PLLs: clkout[0] refers to m2.
@ -154,6 +159,8 @@ struct dss_pll_ops {
}; };
struct dss_pll_hw { struct dss_pll_hw {
enum dss_pll_type type;
unsigned n_max; unsigned n_max;
unsigned m_min; unsigned m_min;
unsigned m_max; unsigned m_max;

View File

@ -130,6 +130,8 @@ static const struct dss_pll_ops dsi_pll_ops = {
}; };
static const struct dss_pll_hw dss_omap4_hdmi_pll_hw = { static const struct dss_pll_hw dss_omap4_hdmi_pll_hw = {
.type = DSS_PLL_TYPE_B,
.n_max = 255, .n_max = 255,
.m_min = 20, .m_min = 20,
.m_max = 4095, .m_max = 4095,
@ -153,6 +155,8 @@ static const struct dss_pll_hw dss_omap4_hdmi_pll_hw = {
}; };
static const struct dss_pll_hw dss_omap5_hdmi_pll_hw = { static const struct dss_pll_hw dss_omap5_hdmi_pll_hw = {
.type = DSS_PLL_TYPE_B,
.n_max = 255, .n_max = 255,
.m_min = 20, .m_min = 20,
.m_max = 2045, .m_max = 2045,

View File

@ -108,6 +108,8 @@ static const struct dss_pll_ops dss_pll_ops = {
}; };
static const struct dss_pll_hw dss_dra7_video_pll_hw = { static const struct dss_pll_hw dss_dra7_video_pll_hw = {
.type = DSS_PLL_TYPE_A,
.n_max = (1 << 8) - 1, .n_max = (1 << 8) - 1,
.m_max = (1 << 12) - 1, .m_max = (1 << 12) - 1,
.mX_max = (1 << 5) - 1, .mX_max = (1 << 5) - 1,