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drivers: PL011: replace UART_MIS reading with _RIS & _IMSC
The PL011 register UART_MIS is actually a bitwise AND of the UART_RIS and the UART_MISC register. Since the SBSA UART does not include the _MIS register, use the two separate registers to get the same behaviour. Since we are inside the spinlock and we read the _IMSC register only once, there should be no race issue. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Mark Langsdorf <mlangsdo@redhat.com> Tested-by: Naresh Bhat <nbhat@cavium.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1322,11 +1322,13 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
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struct uart_amba_port *uap = dev_id;
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struct uart_amba_port *uap = dev_id;
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unsigned long flags;
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unsigned long flags;
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unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
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unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
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u16 imsc;
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int handled = 0;
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int handled = 0;
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unsigned int dummy_read;
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unsigned int dummy_read;
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spin_lock_irqsave(&uap->port.lock, flags);
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spin_lock_irqsave(&uap->port.lock, flags);
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status = readw(uap->port.membase + UART011_MIS);
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imsc = readw(uap->port.membase + UART011_IMSC);
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status = readw(uap->port.membase + UART011_RIS) & imsc;
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if (status) {
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if (status) {
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do {
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do {
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if (uap->vendor->cts_event_workaround) {
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if (uap->vendor->cts_event_workaround) {
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@ -1361,7 +1363,7 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
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if (pass_counter-- == 0)
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if (pass_counter-- == 0)
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break;
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break;
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status = readw(uap->port.membase + UART011_MIS);
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status = readw(uap->port.membase + UART011_RIS) & imsc;
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} while (status != 0);
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} while (status != 0);
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handled = 1;
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handled = 1;
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}
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}
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