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ARM: 7384/1: ThumbEE: Disable userspace TEEHBR access for !CONFIG_ARM_THUMBEE
Currently when ThumbEE is not enabled (!CONFIG_ARM_THUMBEE) the ThumbEE register states are not saved/restored at context switch. The default state of the ThumbEE Ctrl register (TEECR) allows userspace accesses to the ThumbEE Base Handler register (TEEHBR). This can cause unexpected behaviour when people use ThumbEE on !CONFIG_ARM_THUMBEE kernels, as well as allowing covert communication - eg between userspace tasks running inside chroot jails. This patch sets up TEECR in order to prevent user-space access to TEEHBR when !CONFIG_ARM_THUMBEE. In this case, tasks are sent SIGILL if they try to access TEEHBR. Cc: stable@vger.kernel.org Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -254,6 +254,18 @@ __v7_setup:
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ldr r6, =NMRR @ NMRR
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mcr p15, 0, r5, c10, c2, 0 @ write PRRR
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mcr p15, 0, r6, c10, c2, 1 @ write NMRR
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#endif
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#ifndef CONFIG_ARM_THUMBEE
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mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
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and r0, r0, #(0xf << 12) @ ThumbEE enabled field
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teq r0, #(1 << 12) @ check if ThumbEE is present
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bne 1f
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mov r5, #0
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mcr p14, 6, r5, c1, c0, 0 @ Initialize TEEHBR to 0
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mrc p14, 6, r0, c0, c0, 0 @ load TEECR
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orr r0, r0, #1 @ set the 1st bit in order to
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mcr p14, 6, r0, c0, c0, 0 @ stop userspace TEEHBR access
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1:
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#endif
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adr r5, v7_crval
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ldmia r5, {r5, r6}
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