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drm/i915: Make IS_KABYLAKE only take dev_priv 

Saves 1320 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Jani Nikula <jani.nikula@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
This commit is contained in:
Tvrtko Ursulin 2016-10-13 11:03:02 +01:00
parent 772c2a519c
commit 0853723b89
8 changed files with 25 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/i915/i915_drv.c
View File

@ -203,17 +203,17 @@ static void intel_detect_pch(struct drm_device *dev)
} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) { } else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_SPT; dev_priv->pch_type = PCH_SPT;
DRM_DEBUG_KMS("Found SunrisePoint PCH\n"); DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
WARN_ON(!IS_SKYLAKE(dev) && WARN_ON(!IS_SKYLAKE(dev_priv) &&
!IS_KABYLAKE(dev)); !IS_KABYLAKE(dev_priv));
} else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) { } else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_SPT; dev_priv->pch_type = PCH_SPT;
DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n"); DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
WARN_ON(!IS_SKYLAKE(dev) && WARN_ON(!IS_SKYLAKE(dev_priv) &&
!IS_KABYLAKE(dev)); !IS_KABYLAKE(dev_priv));
} else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) { } else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_KBP; dev_priv->pch_type = PCH_KBP;
DRM_DEBUG_KMS("Found KabyPoint PCH\n"); DRM_DEBUG_KMS("Found KabyPoint PCH\n");
WARN_ON(!IS_KABYLAKE(dev)); WARN_ON(!IS_KABYLAKE(dev_priv));
} else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) || } else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
(id == INTEL_PCH_P3X_DEVICE_ID_TYPE) || (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) && ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&

6
drivers/gpu/drm/i915/i915_drv.h
View File

@ -2661,7 +2661,7 @@ struct drm_i915_cmd_table {
#define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell) #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
#define IS_SKYLAKE(dev) (INTEL_INFO(dev)->is_skylake) #define IS_SKYLAKE(dev) (INTEL_INFO(dev)->is_skylake)
#define IS_BROXTON(dev) (INTEL_INFO(dev)->is_broxton) #define IS_BROXTON(dev) (INTEL_INFO(dev)->is_broxton)
#define IS_KABYLAKE(dev) (INTEL_INFO(dev)->is_kabylake) #define IS_KABYLAKE(dev_priv) ((dev_priv)->info.is_kabylake)
#define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \ #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00) (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
@ -2728,8 +2728,8 @@ struct drm_i915_cmd_table {
#define KBL_REVID_D0 0x3 #define KBL_REVID_D0 0x3
#define KBL_REVID_E0 0x4 #define KBL_REVID_E0 0x4
#define IS_KBL_REVID(p, since, until) \ #define IS_KBL_REVID(dev_priv, since, until) \
(IS_KABYLAKE(p) && IS_REVID(p, since, until)) (IS_KABYLAKE(dev_priv) && IS_REVID(dev_priv, since, until))
/* /*
* The genX designation typically refers to the render engine, so render * The genX designation typically refers to the render engine, so render

2
drivers/gpu/drm/i915/i915_gem_stolen.c
View File

@ -456,7 +456,7 @@ int i915_gem_init_stolen(struct drm_device *dev)
break; break;
default: default:
if (IS_BROADWELL(dev_priv) || if (IS_BROADWELL(dev_priv) ||
IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev)) IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
bdw_get_stolen_reserved(dev_priv, &reserved_base, bdw_get_stolen_reserved(dev_priv, &reserved_base,
&reserved_size); &reserved_size);
else else

16
drivers/gpu/drm/i915/intel_ddi.c
View File

@ -1020,13 +1020,13 @@ static void bxt_ddi_clock_get(struct intel_encoder *encoder,
void intel_ddi_clock_get(struct intel_encoder *encoder, void intel_ddi_clock_get(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config) struct intel_crtc_state *pipe_config)
{ {
struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (INTEL_INFO(dev)->gen <= 8) if (INTEL_GEN(dev_priv) <= 8)
hsw_ddi_clock_get(encoder, pipe_config); hsw_ddi_clock_get(encoder, pipe_config);
else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
skl_ddi_clock_get(encoder, pipe_config); skl_ddi_clock_get(encoder, pipe_config);
else if (IS_BROXTON(dev)) else if (IS_BROXTON(dev_priv))
bxt_ddi_clock_get(encoder, pipe_config); bxt_ddi_clock_get(encoder, pipe_config);
} }
@ -1081,14 +1081,14 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
bool intel_ddi_pll_select(struct intel_crtc *intel_crtc, bool intel_ddi_pll_select(struct intel_crtc *intel_crtc,
struct intel_crtc_state *crtc_state) struct intel_crtc_state *crtc_state)
{ {
struct drm_device *dev = intel_crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
struct intel_encoder *intel_encoder = struct intel_encoder *intel_encoder =
intel_ddi_get_crtc_new_encoder(crtc_state); intel_ddi_get_crtc_new_encoder(crtc_state);
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
return skl_ddi_pll_select(intel_crtc, crtc_state, return skl_ddi_pll_select(intel_crtc, crtc_state,
intel_encoder); intel_encoder);
else if (IS_BROXTON(dev)) else if (IS_BROXTON(dev_priv))
return bxt_ddi_pll_select(intel_crtc, crtc_state, return bxt_ddi_pll_select(intel_crtc, crtc_state,
intel_encoder); intel_encoder);
else else
@ -1742,7 +1742,7 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
intel_edp_panel_off(intel_dp); intel_edp_panel_off(intel_dp);
} }
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
I915_WRITE(DPLL_CTRL2, (I915_READ(DPLL_CTRL2) | I915_WRITE(DPLL_CTRL2, (I915_READ(DPLL_CTRL2) |
DPLL_CTRL2_DDI_CLK_OFF(port))); DPLL_CTRL2_DDI_CLK_OFF(port)));
else if (INTEL_INFO(dev)->gen < 9) else if (INTEL_INFO(dev)->gen < 9)

10
drivers/gpu/drm/i915/intel_display.c
View File

@ -5828,7 +5828,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) { if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
u32 limit = I915_READ(SKL_DFSM) & SKL_DFSM_CDCLK_LIMIT_MASK; u32 limit = I915_READ(SKL_DFSM) & SKL_DFSM_CDCLK_LIMIT_MASK;
int max_cdclk, vco; int max_cdclk, vco;
@ -10646,7 +10646,7 @@ static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
port = (tmp & TRANS_DDI_PORT_MASK) >> TRANS_DDI_PORT_SHIFT; port = (tmp & TRANS_DDI_PORT_MASK) >> TRANS_DDI_PORT_SHIFT;
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
skylake_get_ddi_pll(dev_priv, port, pipe_config); skylake_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_BROXTON(dev)) else if (IS_BROXTON(dev))
bxt_get_ddi_pll(dev_priv, port, pipe_config); bxt_get_ddi_pll(dev_priv, port, pipe_config);
@ -12821,7 +12821,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
pipe_config->dpll_hw_state.pll9, pipe_config->dpll_hw_state.pll9,
pipe_config->dpll_hw_state.pll10, pipe_config->dpll_hw_state.pll10,
pipe_config->dpll_hw_state.pcsdw12); pipe_config->dpll_hw_state.pcsdw12);
} else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) { } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
DRM_DEBUG_KMS("dpll_hw_state: " DRM_DEBUG_KMS("dpll_hw_state: "
"ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n", "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
pipe_config->dpll_hw_state.ctrl1, pipe_config->dpll_hw_state.ctrl1,
@ -15420,7 +15420,7 @@ static void intel_setup_outputs(struct drm_device *dev)
*/ */
found = I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; found = I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;
/* WaIgnoreDDIAStrap: skl */ /* WaIgnoreDDIAStrap: skl */
if (found || IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) if (found || IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
intel_ddi_init(dev, PORT_A); intel_ddi_init(dev, PORT_A);
/* DDI B, C and D detection is indicated by the SFUSE_STRAP /* DDI B, C and D detection is indicated by the SFUSE_STRAP
@ -15436,7 +15436,7 @@ static void intel_setup_outputs(struct drm_device *dev)
/* /*
* On SKL we don't have a way to detect DDI-E so we rely on VBT. * On SKL we don't have a way to detect DDI-E so we rely on VBT.
*/ */
if ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) && if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) &&
(dev_priv->vbt.ddi_port_info[PORT_E].supports_dp || (dev_priv->vbt.ddi_port_info[PORT_E].supports_dp ||
dev_priv->vbt.ddi_port_info[PORT_E].supports_dvi || dev_priv->vbt.ddi_port_info[PORT_E].supports_dvi ||
dev_priv->vbt.ddi_port_info[PORT_E].supports_hdmi)) dev_priv->vbt.ddi_port_info[PORT_E].supports_hdmi))

2
drivers/gpu/drm/i915/intel_dpll_mgr.c
View File

@ -1851,7 +1851,7 @@ void intel_shared_dpll_init(struct drm_device *dev)
const struct dpll_info *dpll_info; const struct dpll_info *dpll_info;
int i; int i;
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
dpll_mgr = &skl_pll_mgr; dpll_mgr = &skl_pll_mgr;
else if (IS_BROXTON(dev)) else if (IS_BROXTON(dev))
dpll_mgr = &bxt_pll_mgr; dpll_mgr = &bxt_pll_mgr;

2
drivers/gpu/drm/i915/intel_guc_loader.c
View File

@ -736,7 +736,7 @@ void intel_guc_init(struct drm_device *dev)
fw_path = I915_BXT_GUC_UCODE; fw_path = I915_BXT_GUC_UCODE;
guc_fw->guc_fw_major_wanted = BXT_FW_MAJOR; guc_fw->guc_fw_major_wanted = BXT_FW_MAJOR;
guc_fw->guc_fw_minor_wanted = BXT_FW_MINOR; guc_fw->guc_fw_minor_wanted = BXT_FW_MINOR;
} else if (IS_KABYLAKE(dev)) { } else if (IS_KABYLAKE(dev_priv)) {
fw_path = I915_KBL_GUC_UCODE; fw_path = I915_KBL_GUC_UCODE;
guc_fw->guc_fw_major_wanted = KBL_FW_MAJOR; guc_fw->guc_fw_major_wanted = KBL_FW_MAJOR;
guc_fw->guc_fw_minor_wanted = KBL_FW_MINOR; guc_fw->guc_fw_minor_wanted = KBL_FW_MINOR;

2
drivers/gpu/drm/i915/intel_runtime_pm.c
View File

@ -2594,7 +2594,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume)
power_domains->initializing = true; power_domains->initializing = true;
if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) { if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
skl_display_core_init(dev_priv, resume); skl_display_core_init(dev_priv, resume);
} else if (IS_BROXTON(dev)) { } else if (IS_BROXTON(dev)) {
bxt_display_core_init(dev_priv, resume); bxt_display_core_init(dev_priv, resume);