mirror of https://gitee.com/openkylin/linux.git
Renesas ARM Based SoC DT Updates for v3.18
* Add VIN support to lager/r8a7790, koelsch/r8a7791 and henninger/r8a7791 * Enable DMA for MSIOF and QSPI on r8a7790 and r8a7791 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJT8+TIAAoJENfPZGlqN0++4yMP+gMoh2M+nr80nRLK89cnuZ1M eYrA3E7Cp6CHi8pHSeu97EAo79mUxxqdCIfRBCO7U9kymeH7u+Gl3Uno2qu96vTY 6nOc1fGZrfyKCLwFe0tKx503nBfq5HEMsdGhHNOrFvsZVFwE9NpZ/ZRvBnE8J73G SR6GdZpkyq1r0eGfb7zUxS3DSbhGTFMnTkv1QkUBwsGI8eucLh0QKFpaM4hhxja/ GPmJfY28Vk1zIUJ8yEvib2UNNYAHT8AaEd6lL/nNHdN6il0YSiAYEVBTBWaaxjK0 GKOinjmes+Qr1PbwrNzaHt8gHtspUWkRpHm6spujyAS0LjtTKkL2PUPhwUW6+pJZ rEzW4ukEtKAZryHNwVpj6Bbg4UlCeXsWZVs9k/a2ul8jhi0IKnim0Ktg4EdGTmaU sdpbinecJpDopX9LF091ZL3r1JNJPGL+arFmtO2qis0u/PaSKuCpgo79NFISr6ZU gMZUA4G1U17Es+57QTFPg74gHfeLntGUNE+iQPnVJ2DO6ff+xb+Ky9aRISb+S3NV Gk03nkMES6Oia/6JMg7AgoXNvkgrBWXokcb+V768z49jHzy2uMVLPLQ8T0ZTZzpS FFu6XKAeEaMFDOwqAORTcoALE4zwVoFeMlraowbjB/v2anNMYQK0ui/6+xkjEnbo EXuEevm/z0XxFptApf74 =BuT2 -----END PGP SIGNATURE----- Merge tag 'renesas-dt-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v3.18" from Simon Horman: * Add VIN support to lager/r8a7790, koelsch/r8a7791 and henninger/r8a7791 * Enable DMA for MSIOF and QSPI on r8a7790 and r8a7791 Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-dt-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: lager: add VIN1/ADV7180 device nodes ARM: shmobile: r8a7790: add VIN device nodes ARM: shmobile: r8a7790 dtsi: Enable DMA for MSIOF ARM: shmobile: r8a7790 dtsi: Enable DMA for QSPI ARM: shmobile: r8a7791 dtsi: Enable DMA for MSIOF ARM: shmobile: r8a7791 dtsi: Enable DMA for QSPI ARM: shmobile: r8a7791: Add DMAC devices to DT ARM: shmobile: r8a7790: Add DMAC devices to DT ARM: shmobile: r8a7790: Add DMAC clocks to DT ARM: shmobile: koelsch: add VIN1/ADV7180 DT support ARM: shmobile: henninger: add VIN0/ADV7180 DT support ARM: shmobile: r8a7791: add VIN DT support
This commit is contained in:
Arnd Bergmann
commit
085b5d6faa
|
|
@ -234,6 +234,11 @@ usb2_pins: usb2 {
|
|||
renesas,groups = "usb2";
|
||||
renesas,function = "usb2";
|
||||
};
|
||||
|
||||
vin1_pins: vin {
|
||||
renesas,groups = "vin1_data8", "vin1_clk";
|
||||
renesas,function = "vin1";
|
||||
};
|
||||
};
|
||||
|
||||
ðer {
|
||||
|
|
@ -366,6 +371,19 @@ &iic2 {
|
|||
status = "ok";
|
||||
pinctrl-0 = <&iic2_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
composite-in@20 {
|
||||
compatible = "adi,adv7180";
|
||||
reg = <0x20>;
|
||||
remote = <&vin1>;
|
||||
|
||||
port {
|
||||
adv7180: endpoint {
|
||||
bus-width = <8>;
|
||||
remote-endpoint = <&vin1ep0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&iic3 {
|
||||
|
|
@ -401,3 +419,21 @@ &pci2 {
|
|||
pinctrl-0 = <&usb2_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/* composite video input */
|
||||
&vin1 {
|
||||
pinctrl-0 = <&vin1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "ok";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vin1ep0: endpoint {
|
||||
remote-endpoint = <&adv7180>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -33,6 +33,10 @@ aliases {
|
|||
spi2 = &msiof1;
|
||||
spi3 = &msiof2;
|
||||
spi4 = &msiof3;
|
||||
vin0 = &vin0;
|
||||
vin1 = &vin1;
|
||||
vin2 = &vin2;
|
||||
vin3 = &vin3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
@ -217,6 +221,65 @@ irqc0: interrupt-controller@e61c0000 {
|
|||
<0 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@e6700000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
|
||||
0 200 IRQ_TYPE_LEVEL_HIGH
|
||||
0 201 IRQ_TYPE_LEVEL_HIGH
|
||||
0 202 IRQ_TYPE_LEVEL_HIGH
|
||||
0 203 IRQ_TYPE_LEVEL_HIGH
|
||||
0 204 IRQ_TYPE_LEVEL_HIGH
|
||||
0 205 IRQ_TYPE_LEVEL_HIGH
|
||||
0 206 IRQ_TYPE_LEVEL_HIGH
|
||||
0 207 IRQ_TYPE_LEVEL_HIGH
|
||||
0 208 IRQ_TYPE_LEVEL_HIGH
|
||||
0 209 IRQ_TYPE_LEVEL_HIGH
|
||||
0 210 IRQ_TYPE_LEVEL_HIGH
|
||||
0 211 IRQ_TYPE_LEVEL_HIGH
|
||||
0 212 IRQ_TYPE_LEVEL_HIGH
|
||||
0 213 IRQ_TYPE_LEVEL_HIGH
|
||||
0 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
"ch8", "ch9", "ch10", "ch11",
|
||||
"ch12", "ch13", "ch14";
|
||||
clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
|
||||
clock-names = "fck";
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <15>;
|
||||
};
|
||||
|
||||
dmac1: dma-controller@e6720000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
|
||||
0 216 IRQ_TYPE_LEVEL_HIGH
|
||||
0 217 IRQ_TYPE_LEVEL_HIGH
|
||||
0 218 IRQ_TYPE_LEVEL_HIGH
|
||||
0 219 IRQ_TYPE_LEVEL_HIGH
|
||||
0 308 IRQ_TYPE_LEVEL_HIGH
|
||||
0 309 IRQ_TYPE_LEVEL_HIGH
|
||||
0 310 IRQ_TYPE_LEVEL_HIGH
|
||||
0 311 IRQ_TYPE_LEVEL_HIGH
|
||||
0 312 IRQ_TYPE_LEVEL_HIGH
|
||||
0 313 IRQ_TYPE_LEVEL_HIGH
|
||||
0 314 IRQ_TYPE_LEVEL_HIGH
|
||||
0 315 IRQ_TYPE_LEVEL_HIGH
|
||||
0 316 IRQ_TYPE_LEVEL_HIGH
|
||||
0 317 IRQ_TYPE_LEVEL_HIGH
|
||||
0 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
"ch8", "ch9", "ch10", "ch11",
|
||||
"ch12", "ch13", "ch14";
|
||||
clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
|
||||
clock-names = "fck";
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <15>;
|
||||
};
|
||||
i2c0: i2c@e6508000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -473,6 +536,38 @@ sata1: sata@ee500000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
vin0: video@e6ef0000 {
|
||||
compatible = "renesas,vin-r8a7790";
|
||||
clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
|
||||
reg = <0 0xe6ef0000 0 0x1000>;
|
||||
interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vin1: video@e6ef1000 {
|
||||
compatible = "renesas,vin-r8a7790";
|
||||
clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
|
||||
reg = <0 0xe6ef1000 0 0x1000>;
|
||||
interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vin2: video@e6ef2000 {
|
||||
compatible = "renesas,vin-r8a7790";
|
||||
clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
|
||||
reg = <0 0xe6ef2000 0 0x1000>;
|
||||
interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vin3: video@e6ef3000 {
|
||||
compatible = "renesas,vin-r8a7790";
|
||||
clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
|
||||
reg = <0 0xe6ef3000 0 0x1000>;
|
||||
interrupts = <0 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
|
@ -758,16 +853,19 @@ mstp2_clks: mstp2_clks@e6150138 {
|
|||
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
|
||||
clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
|
||||
<&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>;
|
||||
<&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
|
||||
<&zs_clk>;
|
||||
#clock-cells = <1>;
|
||||
renesas,clock-indices = <
|
||||
R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
|
||||
R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
|
||||
R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
|
||||
R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
|
||||
>;
|
||||
clock-output-names =
|
||||
"scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
|
||||
"scifb1", "msiof1", "msiof3", "scifb2";
|
||||
"scifb1", "msiof1", "msiof3", "scifb2",
|
||||
"sys-dmac1", "sys-dmac0";
|
||||
};
|
||||
mstp3_clks: mstp3_clks@e615013c {
|
||||
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
|
|
@ -884,6 +982,8 @@ qspi: spi@e6b10000 {
|
|||
reg = <0 0xe6b10000 0 0x2c>;
|
||||
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
|
||||
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
|
||||
dma-names = "tx", "rx";
|
||||
num-cs = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -892,9 +992,11 @@ qspi: spi@e6b10000 {
|
|||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
|
||||
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -902,9 +1004,11 @@ msiof0: spi@e6e20000 {
|
|||
|
||||
msiof1: spi@e6e10000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6e10000 0 0x0064>;
|
||||
reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>;
|
||||
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
|
||||
dmas = <&dmac0 0x55>, <&dmac0 0x56>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -912,9 +1016,11 @@ msiof1: spi@e6e10000 {
|
|||
|
||||
msiof2: spi@e6e00000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6e00000 0 0x0064>;
|
||||
reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>;
|
||||
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
|
||||
dmas = <&dmac0 0x41>, <&dmac0 0x42>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -922,9 +1028,11 @@ msiof2: spi@e6e00000 {
|
|||
|
||||
msiof3: spi@e6c90000 {
|
||||
compatible = "renesas,msiof-r8a7790";
|
||||
reg = <0 0xe6c90000 0 0x0064>;
|
||||
reg = <0 0xe6c90000 0 0x0064>, <0 0xe7c90000 0 0x0064>;
|
||||
interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
|
||||
dmas = <&dmac0 0x45>, <&dmac0 0x46>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -135,6 +135,11 @@ usb1_pins: usb1 {
|
|||
renesas,groups = "usb1";
|
||||
renesas,function = "usb1";
|
||||
};
|
||||
|
||||
vin0_pins: vin0 {
|
||||
renesas,groups = "vin0_data8", "vin0_clk";
|
||||
renesas,function = "vin0";
|
||||
};
|
||||
};
|
||||
|
||||
&scif0 {
|
||||
|
|
@ -191,6 +196,19 @@ &i2c2 {
|
|||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
composite-in@20 {
|
||||
compatible = "adi,adv7180";
|
||||
reg = <0x20>;
|
||||
remote = <&vin0>;
|
||||
|
||||
port {
|
||||
adv7180: endpoint {
|
||||
bus-width = <8>;
|
||||
remote-endpoint = <&vin0ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qspi {
|
||||
|
|
@ -260,3 +278,20 @@ &pcie_bus_clk {
|
|||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* composite video input */
|
||||
&vin0 {
|
||||
status = "ok";
|
||||
pinctrl-0 = <&vin0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vin0ep: endpoint {
|
||||
remote-endpoint = <&adv7180>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -289,6 +289,11 @@ usb1_pins: usb1 {
|
|||
renesas,groups = "usb1";
|
||||
renesas,function = "usb1";
|
||||
};
|
||||
|
||||
vin1_pins: vin1 {
|
||||
renesas,groups = "vin1_data8", "vin1_clk";
|
||||
renesas,function = "vin1";
|
||||
};
|
||||
};
|
||||
|
||||
ðer {
|
||||
|
|
@ -412,6 +417,19 @@ &i2c2 {
|
|||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
composite-in@20 {
|
||||
compatible = "adi,adv7180";
|
||||
reg = <0x20>;
|
||||
remote = <&vin1>;
|
||||
|
||||
port {
|
||||
adv7180: endpoint {
|
||||
bus-width = <8>;
|
||||
remote-endpoint = <&vin1ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "renesas,24c02";
|
||||
reg = <0x50>;
|
||||
|
|
@ -459,3 +477,20 @@ &pciec {
|
|||
&cpu0 {
|
||||
cpu0-supply = <&vdd_dvfs>;
|
||||
};
|
||||
|
||||
/* composite video input */
|
||||
&vin1 {
|
||||
status = "ok";
|
||||
pinctrl-0 = <&vin1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vin1ep: endpoint {
|
||||
remote-endpoint = <&adv7180>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -34,6 +34,9 @@ aliases {
|
|||
spi1 = &msiof0;
|
||||
spi2 = &msiof1;
|
||||
spi3 = &msiof2;
|
||||
vin0 = &vin0;
|
||||
vin1 = &vin1;
|
||||
vin2 = &vin2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
@ -206,6 +209,66 @@ irqc0: interrupt-controller@e61c0000 {
|
|||
<0 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@e6700000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
|
||||
0 200 IRQ_TYPE_LEVEL_HIGH
|
||||
0 201 IRQ_TYPE_LEVEL_HIGH
|
||||
0 202 IRQ_TYPE_LEVEL_HIGH
|
||||
0 203 IRQ_TYPE_LEVEL_HIGH
|
||||
0 204 IRQ_TYPE_LEVEL_HIGH
|
||||
0 205 IRQ_TYPE_LEVEL_HIGH
|
||||
0 206 IRQ_TYPE_LEVEL_HIGH
|
||||
0 207 IRQ_TYPE_LEVEL_HIGH
|
||||
0 208 IRQ_TYPE_LEVEL_HIGH
|
||||
0 209 IRQ_TYPE_LEVEL_HIGH
|
||||
0 210 IRQ_TYPE_LEVEL_HIGH
|
||||
0 211 IRQ_TYPE_LEVEL_HIGH
|
||||
0 212 IRQ_TYPE_LEVEL_HIGH
|
||||
0 213 IRQ_TYPE_LEVEL_HIGH
|
||||
0 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
"ch8", "ch9", "ch10", "ch11",
|
||||
"ch12", "ch13", "ch14";
|
||||
clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>;
|
||||
clock-names = "fck";
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <15>;
|
||||
};
|
||||
|
||||
dmac1: dma-controller@e6720000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
|
||||
0 216 IRQ_TYPE_LEVEL_HIGH
|
||||
0 217 IRQ_TYPE_LEVEL_HIGH
|
||||
0 218 IRQ_TYPE_LEVEL_HIGH
|
||||
0 219 IRQ_TYPE_LEVEL_HIGH
|
||||
0 308 IRQ_TYPE_LEVEL_HIGH
|
||||
0 309 IRQ_TYPE_LEVEL_HIGH
|
||||
0 310 IRQ_TYPE_LEVEL_HIGH
|
||||
0 311 IRQ_TYPE_LEVEL_HIGH
|
||||
0 312 IRQ_TYPE_LEVEL_HIGH
|
||||
0 313 IRQ_TYPE_LEVEL_HIGH
|
||||
0 314 IRQ_TYPE_LEVEL_HIGH
|
||||
0 315 IRQ_TYPE_LEVEL_HIGH
|
||||
0 316 IRQ_TYPE_LEVEL_HIGH
|
||||
0 317 IRQ_TYPE_LEVEL_HIGH
|
||||
0 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
"ch8", "ch9", "ch10", "ch11",
|
||||
"ch12", "ch13", "ch14";
|
||||
clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>;
|
||||
clock-names = "fck";
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <15>;
|
||||
};
|
||||
|
||||
/* The memory map in the User's Manual maps the cores to bus numbers */
|
||||
i2c0: i2c@e6508000 {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -518,6 +581,30 @@ sata1: sata@ee500000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
vin0: video@e6ef0000 {
|
||||
compatible = "renesas,vin-r8a7791";
|
||||
clocks = <&mstp8_clks R8A7791_CLK_VIN0>;
|
||||
reg = <0 0xe6ef0000 0 0x1000>;
|
||||
interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vin1: video@e6ef1000 {
|
||||
compatible = "renesas,vin-r8a7791";
|
||||
clocks = <&mstp8_clks R8A7791_CLK_VIN1>;
|
||||
reg = <0 0xe6ef1000 0 0x1000>;
|
||||
interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vin2: video@e6ef2000 {
|
||||
compatible = "renesas,vin-r8a7791";
|
||||
clocks = <&mstp8_clks R8A7791_CLK_VIN2>;
|
||||
reg = <0 0xe6ef2000 0 0x1000>;
|
||||
interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
|
@ -925,6 +1012,8 @@ qspi: spi@e6b10000 {
|
|||
reg = <0 0xe6b10000 0 0x2c>;
|
||||
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
|
||||
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
|
||||
dma-names = "tx", "rx";
|
||||
num-cs = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -933,9 +1022,11 @@ qspi: spi@e6b10000 {
|
|||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
|
||||
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -943,9 +1034,11 @@ msiof0: spi@e6e20000 {
|
|||
|
||||
msiof1: spi@e6e10000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e10000 0 0x0064>;
|
||||
reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>;
|
||||
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
|
||||
dmas = <&dmac0 0x55>, <&dmac0 0x56>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -953,9 +1046,11 @@ msiof1: spi@e6e10000 {
|
|||
|
||||
msiof2: spi@e6e00000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e00000 0 0x0064>;
|
||||
reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>;
|
||||
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
|
||||
dmas = <&dmac0 0x41>, <&dmac0 0x42>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
Loading…
Reference in New Issue