mirror of https://gitee.com/openkylin/linux.git
Merge branch 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
* 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Invert VCLK polarity for framebuffer on ORIGEN ARM: S3C64XX: Fix interrupt configuration for PCA935x on Cragganmore ARM: S3C64XX: Fix the memory mapped GPIOs on Cragganmore ARM: S3C64XX: Remove hsmmc1 from Cragganmore ARM: S3C64XX: Remove unconditional power domain disables ARM: SAMSUNG: Declare struct platform_device in plat/s3c64xx-spi.h ARM: SAMSUNG: dma-ops.h needs mach/dma.h ARM: SAMSUNG: Guard against multiple inclusion of plat/dma.h
This commit is contained in:
commit
090e648a20
|
@ -597,7 +597,8 @@ static struct s3c_fb_pd_win origen_fb_win0 = {
|
|||
static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
|
||||
.win[0] = &origen_fb_win0,
|
||||
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
|
||||
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
|
||||
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
|
||||
VIDCON1_INV_VCLK,
|
||||
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
|
||||
};
|
||||
|
||||
|
|
|
@ -21,5 +21,6 @@
|
|||
#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
|
||||
#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32)
|
||||
#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64)
|
||||
#define MMGPIO_GPIO_BASE (GPIO_BOARD_START + 96)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -260,6 +260,7 @@ static struct platform_device crag6410_dm9k_device = {
|
|||
|
||||
static struct resource crag6410_mmgpio_resource[] = {
|
||||
[0] = {
|
||||
.name = "dat",
|
||||
.start = S3C64XX_PA_XM0CSN4 + 1,
|
||||
.end = S3C64XX_PA_XM0CSN4 + 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
|
@ -272,7 +273,7 @@ static struct platform_device crag6410_mmgpio = {
|
|||
.resource = crag6410_mmgpio_resource,
|
||||
.num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
|
||||
.dev.platform_data = &(struct bgpio_pdata) {
|
||||
.base = -1,
|
||||
.base = MMGPIO_GPIO_BASE,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -328,7 +329,6 @@ static struct platform_device wallvdd_device = {
|
|||
|
||||
static struct platform_device *crag6410_devices[] __initdata = {
|
||||
&s3c_device_hsmmc0,
|
||||
&s3c_device_hsmmc1,
|
||||
&s3c_device_hsmmc2,
|
||||
&s3c_device_i2c0,
|
||||
&s3c_device_i2c1,
|
||||
|
@ -355,7 +355,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
|
|||
|
||||
static struct pca953x_platform_data crag6410_pca_data = {
|
||||
.gpio_base = PCA935X_GPIO_BASE,
|
||||
.irq_base = 0,
|
||||
.irq_base = -1,
|
||||
};
|
||||
|
||||
/* VDDARM is controlled by DVS1 connected to GPK(0) */
|
||||
|
@ -683,12 +683,6 @@ static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
|
|||
.cd_type = S3C_SDHCI_CD_PERMANENT,
|
||||
};
|
||||
|
||||
static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
|
||||
.max_width = 4,
|
||||
.cd_type = S3C_SDHCI_CD_GPIO,
|
||||
.ext_cd_gpio = S3C64XX_GPF(11),
|
||||
};
|
||||
|
||||
static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
|
||||
{
|
||||
/* Set all the necessary GPG pins to special-function 2 */
|
||||
|
@ -723,7 +717,6 @@ static void __init crag6410_machine_init(void)
|
|||
gpio_direction_output(S3C64XX_GPF(10), 1);
|
||||
|
||||
s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
|
||||
s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
|
||||
s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
|
||||
|
||||
s3c_i2c0_set_platdata(&i2c0_pdata);
|
||||
|
|
|
@ -346,23 +346,10 @@ int __init s3c64xx_pm_init(void)
|
|||
|
||||
static __init int s3c64xx_pm_initcall(void)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
pm_cpu_prep = s3c64xx_pm_prepare;
|
||||
pm_cpu_sleep = s3c64xx_cpu_suspend;
|
||||
pm_uart_udivslot = 1;
|
||||
|
||||
/*
|
||||
* Unconditionally disable power domains that contain only
|
||||
* blocks which have no mainline driver support.
|
||||
*/
|
||||
val = __raw_readl(S3C64XX_NORMAL_CFG);
|
||||
val &= ~(S3C64XX_NORMALCFG_DOMAIN_G_ON |
|
||||
S3C64XX_NORMALCFG_DOMAIN_V_ON |
|
||||
S3C64XX_NORMALCFG_DOMAIN_I_ON |
|
||||
S3C64XX_NORMALCFG_DOMAIN_P_ON);
|
||||
__raw_writel(val, S3C64XX_NORMAL_CFG);
|
||||
|
||||
#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
|
||||
gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
|
||||
gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#define __SAMSUNG_DMA_OPS_H_ __FILE__
|
||||
|
||||
#include <linux/dmaengine.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
struct samsung_dma_prep_info {
|
||||
enum dma_transaction_type cap;
|
||||
|
|
|
@ -10,6 +10,9 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __PLAT_DMA_H
|
||||
#define __PLAT_DMA_H
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
enum s3c2410_dma_buffresult {
|
||||
|
@ -122,5 +125,6 @@ extern int s3c2410_dma_getposition(enum dma_ch channel,
|
|||
extern int s3c2410_dma_set_opfn(enum dma_ch, s3c2410_dma_opfn_t rtn);
|
||||
extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn);
|
||||
|
||||
|
||||
#include <plat/dma-ops.h>
|
||||
|
||||
#endif
|
||||
|
|
|
@ -11,6 +11,8 @@
|
|||
#ifndef __S3C64XX_PLAT_SPI_H
|
||||
#define __S3C64XX_PLAT_SPI_H
|
||||
|
||||
struct platform_device;
|
||||
|
||||
/**
|
||||
* struct s3c64xx_spi_csinfo - ChipSelect description
|
||||
* @fb_delay: Slave specific feedback delay.
|
||||
|
|
Loading…
Reference in New Issue