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drm/amdgpu: atombios change for dce6 to work v3
v3: white space fixes Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -497,7 +497,13 @@ void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev,
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* SetPixelClock provides the dividers
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*/
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args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);
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args.v6.ucPpll = ATOM_EXT_PLL1;
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if (adev->asic_type == CHIP_TAHITI ||
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adev->asic_type == CHIP_PITCAIRN ||
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adev->asic_type == CHIP_VERDE ||
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adev->asic_type == CHIP_OLAND)
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args.v6.ucPpll = ATOM_PPLL0;
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else
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args.v6.ucPpll = ATOM_EXT_PLL1;
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break;
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default:
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DRM_ERROR("Unknown table version %d %d\n", frev, crev);
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