mirror of https://gitee.com/openkylin/linux.git
powerpc/watchpoint: Rename current DAWR macros
Power10 is introducing second DAWR. Use real register names from ISA for current macros: s/SPRN_DAWR/SPRN_DAWR0/ s/SPRN_DAWRX/SPRN_DAWRX0/ Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Michael Neuling <mikey@neuling.org> Link: https://lore.kernel.org/r/20200514111741.97993-2-ravi.bangoria@linux.ibm.com
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3920742b92
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@ -283,14 +283,14 @@
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#define CTRL_CT1 0x40000000 /* thread 1 */
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#define CTRL_CT1 0x40000000 /* thread 1 */
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#define CTRL_TE 0x00c00000 /* thread enable */
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#define CTRL_TE 0x00c00000 /* thread enable */
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#define CTRL_RUNLATCH 0x1
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#define CTRL_RUNLATCH 0x1
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#define SPRN_DAWR 0xB4
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#define SPRN_DAWR0 0xB4
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#define SPRN_RPR 0xBA /* Relative Priority Register */
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#define SPRN_RPR 0xBA /* Relative Priority Register */
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#define SPRN_CIABR 0xBB
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#define SPRN_CIABR 0xBB
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#define CIABR_PRIV 0x3
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#define CIABR_PRIV 0x3
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#define CIABR_PRIV_USER 1
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#define CIABR_PRIV_USER 1
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#define CIABR_PRIV_SUPER 2
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#define CIABR_PRIV_SUPER 2
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#define CIABR_PRIV_HYPER 3
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#define CIABR_PRIV_HYPER 3
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#define SPRN_DAWRX 0xBC
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#define SPRN_DAWRX0 0xBC
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#define DAWRX_USER __MASK(0)
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#define DAWRX_USER __MASK(0)
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#define DAWRX_KERNEL __MASK(1)
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#define DAWRX_KERNEL __MASK(1)
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#define DAWRX_HYP __MASK(2)
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#define DAWRX_HYP __MASK(2)
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@ -39,8 +39,8 @@ int set_dawr(struct arch_hw_breakpoint *brk)
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if (ppc_md.set_dawr)
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if (ppc_md.set_dawr)
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return ppc_md.set_dawr(dawr, dawrx);
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return ppc_md.set_dawr(dawr, dawrx);
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mtspr(SPRN_DAWR, dawr);
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mtspr(SPRN_DAWR0, dawr);
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mtspr(SPRN_DAWRX, dawrx);
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mtspr(SPRN_DAWRX0, dawrx);
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return 0;
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return 0;
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}
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}
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@ -3392,8 +3392,8 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
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int trap;
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int trap;
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unsigned long host_hfscr = mfspr(SPRN_HFSCR);
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unsigned long host_hfscr = mfspr(SPRN_HFSCR);
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unsigned long host_ciabr = mfspr(SPRN_CIABR);
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unsigned long host_ciabr = mfspr(SPRN_CIABR);
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unsigned long host_dawr = mfspr(SPRN_DAWR);
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unsigned long host_dawr = mfspr(SPRN_DAWR0);
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unsigned long host_dawrx = mfspr(SPRN_DAWRX);
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unsigned long host_dawrx = mfspr(SPRN_DAWRX0);
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unsigned long host_psscr = mfspr(SPRN_PSSCR);
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unsigned long host_psscr = mfspr(SPRN_PSSCR);
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unsigned long host_pidr = mfspr(SPRN_PID);
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unsigned long host_pidr = mfspr(SPRN_PID);
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@ -3422,8 +3422,8 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
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mtspr(SPRN_SPURR, vcpu->arch.spurr);
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mtspr(SPRN_SPURR, vcpu->arch.spurr);
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if (dawr_enabled()) {
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if (dawr_enabled()) {
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mtspr(SPRN_DAWR, vcpu->arch.dawr);
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mtspr(SPRN_DAWR0, vcpu->arch.dawr);
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mtspr(SPRN_DAWRX, vcpu->arch.dawrx);
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mtspr(SPRN_DAWRX0, vcpu->arch.dawrx);
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}
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}
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mtspr(SPRN_CIABR, vcpu->arch.ciabr);
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mtspr(SPRN_CIABR, vcpu->arch.ciabr);
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mtspr(SPRN_IC, vcpu->arch.ic);
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mtspr(SPRN_IC, vcpu->arch.ic);
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@ -3475,8 +3475,8 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
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(local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
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(local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
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mtspr(SPRN_HFSCR, host_hfscr);
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mtspr(SPRN_HFSCR, host_hfscr);
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mtspr(SPRN_CIABR, host_ciabr);
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mtspr(SPRN_CIABR, host_ciabr);
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mtspr(SPRN_DAWR, host_dawr);
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mtspr(SPRN_DAWR0, host_dawr);
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mtspr(SPRN_DAWRX, host_dawrx);
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mtspr(SPRN_DAWRX0, host_dawrx);
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mtspr(SPRN_PID, host_pidr);
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mtspr(SPRN_PID, host_pidr);
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/*
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/*
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@ -707,8 +707,8 @@ BEGIN_FTR_SECTION
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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mfspr r5, SPRN_CIABR
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mfspr r5, SPRN_CIABR
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mfspr r6, SPRN_DAWR
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mfspr r6, SPRN_DAWR0
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mfspr r7, SPRN_DAWRX
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mfspr r7, SPRN_DAWRX0
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mfspr r8, SPRN_IAMR
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mfspr r8, SPRN_IAMR
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std r5, STACK_SLOT_CIABR(r1)
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std r5, STACK_SLOT_CIABR(r1)
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std r6, STACK_SLOT_DAWR(r1)
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std r6, STACK_SLOT_DAWR(r1)
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@ -803,8 +803,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
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beq 1f
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beq 1f
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ld r5, VCPU_DAWR(r4)
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ld r5, VCPU_DAWR(r4)
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ld r6, VCPU_DAWRX(r4)
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ld r6, VCPU_DAWRX(r4)
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mtspr SPRN_DAWR, r5
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mtspr SPRN_DAWR0, r5
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mtspr SPRN_DAWRX, r6
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mtspr SPRN_DAWRX0, r6
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1:
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1:
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ld r7, VCPU_CIABR(r4)
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ld r7, VCPU_CIABR(r4)
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ld r8, VCPU_TAR(r4)
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ld r8, VCPU_TAR(r4)
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@ -1766,8 +1766,8 @@ BEGIN_FTR_SECTION
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* If the DAWR doesn't work, it's ok to write these here as
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* If the DAWR doesn't work, it's ok to write these here as
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* this value should always be zero
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* this value should always be zero
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*/
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*/
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mtspr SPRN_DAWR, r6
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mtspr SPRN_DAWR0, r6
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mtspr SPRN_DAWRX, r7
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mtspr SPRN_DAWRX0, r7
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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ld r5, STACK_SLOT_TID(r1)
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ld r5, STACK_SLOT_TID(r1)
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@ -2577,8 +2577,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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mfmsr r6
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mfmsr r6
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andi. r6, r6, MSR_DR /* in real mode? */
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andi. r6, r6, MSR_DR /* in real mode? */
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bne 4f
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bne 4f
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mtspr SPRN_DAWR, r4
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mtspr SPRN_DAWR0, r4
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mtspr SPRN_DAWRX, r5
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mtspr SPRN_DAWRX0, r5
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4: li r3, 0
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4: li r3, 0
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blr
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blr
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@ -3329,7 +3329,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
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mtspr SPRN_AMR, r0
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mtspr SPRN_AMR, r0
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mtspr SPRN_IAMR, r0
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mtspr SPRN_IAMR, r0
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mtspr SPRN_CIABR, r0
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mtspr SPRN_CIABR, r0
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mtspr SPRN_DAWRX, r0
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mtspr SPRN_DAWRX0, r0
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BEGIN_MMU_FTR_SECTION
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BEGIN_MMU_FTR_SECTION
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b 4f
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b 4f
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@ -1956,7 +1956,7 @@ static void dump_207_sprs(void)
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printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
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printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
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mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
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mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
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printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
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printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
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mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
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mfspr(SPRN_DAWR0), mfspr(SPRN_DAWRX0), mfspr(SPRN_CIABR));
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#endif
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#endif
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}
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}
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