mirror of https://gitee.com/openkylin/linux.git
Merge branch 'aquantia-fixes'
Igor Russkikh says: ==================== net: aquantia: Atlantic driver 12/2017 updates The patchset contains important hardware fix for machines with large MRRS and couple of improvement in stats and capabilities reporting patch v3: - Fixed patch #7 after Andrew's finding. NIC level stats actually have to be cleaned only on hw struct creation (and this is done in kzalloc). On each hwinit we only have to reset link state to make sure hw stats update will not increment nic stats during init. patch v2: - split into more detailed commits Comment from David on wrong defines case will be submitted separately later ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
0a0606970f
|
@ -50,7 +50,7 @@
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|||
#define AQ_CFG_PCI_FUNC_MSIX_IRQS 9U
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#define AQ_CFG_PCI_FUNC_PORTS 2U
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#define AQ_CFG_SERVICE_TIMER_INTERVAL (2 * HZ)
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#define AQ_CFG_SERVICE_TIMER_INTERVAL (1 * HZ)
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#define AQ_CFG_POLLING_TIMER_INTERVAL ((unsigned int)(2 * HZ))
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#define AQ_CFG_SKB_FRAGS_MAX 32U
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@ -80,6 +80,7 @@
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#define AQ_CFG_DRV_VERSION __stringify(NIC_MAJOR_DRIVER_VERSION)"."\
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__stringify(NIC_MINOR_DRIVER_VERSION)"."\
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__stringify(NIC_BUILD_DRIVER_VERSION)"."\
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__stringify(NIC_REVISION_DRIVER_VERSION)
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__stringify(NIC_REVISION_DRIVER_VERSION) \
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AQ_CFG_DRV_VERSION_SUFFIX
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#endif /* AQ_CFG_H */
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|
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@ -66,14 +66,14 @@ static const char aq_ethtool_stat_names[][ETH_GSTRING_LEN] = {
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"OutUCast",
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"OutMCast",
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"OutBCast",
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"InUCastOctects",
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"OutUCastOctects",
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"InMCastOctects",
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"OutMCastOctects",
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"InBCastOctects",
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"OutBCastOctects",
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"InOctects",
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"OutOctects",
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"InUCastOctets",
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"OutUCastOctets",
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"InMCastOctets",
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"OutMCastOctets",
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"InBCastOctets",
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"OutBCastOctets",
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"InOctets",
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"OutOctets",
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"InPacketsDma",
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"OutPacketsDma",
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"InOctetsDma",
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@ -46,6 +46,28 @@ struct aq_hw_link_status_s {
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unsigned int mbps;
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};
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struct aq_stats_s {
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u64 uprc;
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u64 mprc;
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u64 bprc;
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u64 erpt;
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u64 uptc;
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u64 mptc;
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u64 bptc;
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u64 erpr;
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u64 mbtc;
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u64 bbtc;
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u64 mbrc;
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u64 bbrc;
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u64 ubrc;
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u64 ubtc;
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u64 dpc;
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u64 dma_pkt_rc;
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u64 dma_pkt_tc;
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u64 dma_oct_rc;
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u64 dma_oct_tc;
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};
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#define AQ_HW_IRQ_INVALID 0U
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#define AQ_HW_IRQ_LEGACY 1U
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#define AQ_HW_IRQ_MSI 2U
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@ -85,7 +107,9 @@ struct aq_hw_ops {
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void (*destroy)(struct aq_hw_s *self);
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int (*get_hw_caps)(struct aq_hw_s *self,
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struct aq_hw_caps_s *aq_hw_caps);
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struct aq_hw_caps_s *aq_hw_caps,
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unsigned short device,
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unsigned short subsystem_device);
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int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,
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unsigned int frags);
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@ -164,8 +188,7 @@ struct aq_hw_ops {
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int (*hw_update_stats)(struct aq_hw_s *self);
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int (*hw_get_hw_stats)(struct aq_hw_s *self, u64 *data,
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unsigned int *p_count);
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struct aq_stats_s *(*hw_get_hw_stats)(struct aq_hw_s *self);
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int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version);
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@ -37,6 +37,8 @@ static unsigned int aq_itr_rx;
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module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
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MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
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static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
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static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
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{
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struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
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|
@ -166,11 +168,8 @@ static int aq_nic_update_link_status(struct aq_nic_s *self)
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static void aq_nic_service_timer_cb(struct timer_list *t)
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{
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struct aq_nic_s *self = from_timer(self, t, service_timer);
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struct net_device *ndev = aq_nic_get_ndev(self);
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int ctimer = AQ_CFG_SERVICE_TIMER_INTERVAL;
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int err = 0;
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unsigned int i = 0U;
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struct aq_ring_stats_rx_s stats_rx;
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struct aq_ring_stats_tx_s stats_tx;
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if (aq_utils_obj_test(&self->header.flags, AQ_NIC_FLAGS_IS_NOT_READY))
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goto err_exit;
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@ -182,23 +181,14 @@ static void aq_nic_service_timer_cb(struct timer_list *t)
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if (self->aq_hw_ops.hw_update_stats)
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self->aq_hw_ops.hw_update_stats(self->aq_hw);
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memset(&stats_rx, 0U, sizeof(struct aq_ring_stats_rx_s));
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memset(&stats_tx, 0U, sizeof(struct aq_ring_stats_tx_s));
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for (i = AQ_DIMOF(self->aq_vec); i--;) {
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if (self->aq_vec[i])
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aq_vec_add_stats(self->aq_vec[i], &stats_rx, &stats_tx);
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}
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aq_nic_update_ndev_stats(self);
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ndev->stats.rx_packets = stats_rx.packets;
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ndev->stats.rx_bytes = stats_rx.bytes;
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ndev->stats.rx_errors = stats_rx.errors;
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ndev->stats.tx_packets = stats_tx.packets;
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ndev->stats.tx_bytes = stats_tx.bytes;
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ndev->stats.tx_errors = stats_tx.errors;
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/* If no link - use faster timer rate to detect link up asap */
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if (!netif_carrier_ok(self->ndev))
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ctimer = max(ctimer / 2, 1);
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err_exit:
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mod_timer(&self->service_timer,
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jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);
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mod_timer(&self->service_timer, jiffies + ctimer);
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}
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static void aq_nic_polling_timer_cb(struct timer_list *t)
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@ -222,7 +212,7 @@ static struct net_device *aq_nic_ndev_alloc(void)
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struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
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const struct ethtool_ops *et_ops,
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struct device *dev,
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struct pci_dev *pdev,
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struct aq_pci_func_s *aq_pci_func,
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unsigned int port,
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const struct aq_hw_ops *aq_hw_ops)
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|
@ -242,7 +232,7 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
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ndev->netdev_ops = ndev_ops;
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ndev->ethtool_ops = et_ops;
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|
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SET_NETDEV_DEV(ndev, dev);
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SET_NETDEV_DEV(ndev, &pdev->dev);
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ndev->if_port = port;
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self->ndev = ndev;
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@ -254,7 +244,8 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
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self->aq_hw = self->aq_hw_ops.create(aq_pci_func, self->port,
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&self->aq_hw_ops);
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err = self->aq_hw_ops.get_hw_caps(self->aq_hw, &self->aq_hw_caps);
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err = self->aq_hw_ops.get_hw_caps(self->aq_hw, &self->aq_hw_caps,
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pdev->device, pdev->subsystem_device);
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if (err < 0)
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goto err_exit;
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@ -749,16 +740,40 @@ int aq_nic_get_regs_count(struct aq_nic_s *self)
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void aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
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{
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struct aq_vec_s *aq_vec = NULL;
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unsigned int i = 0U;
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unsigned int count = 0U;
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int err = 0;
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struct aq_vec_s *aq_vec = NULL;
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struct aq_stats_s *stats = self->aq_hw_ops.hw_get_hw_stats(self->aq_hw);
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err = self->aq_hw_ops.hw_get_hw_stats(self->aq_hw, data, &count);
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if (err < 0)
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if (!stats)
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goto err_exit;
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data += count;
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data[i] = stats->uprc + stats->mprc + stats->bprc;
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data[++i] = stats->uprc;
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data[++i] = stats->mprc;
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data[++i] = stats->bprc;
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data[++i] = stats->erpt;
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data[++i] = stats->uptc + stats->mptc + stats->bptc;
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data[++i] = stats->uptc;
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data[++i] = stats->mptc;
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data[++i] = stats->bptc;
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data[++i] = stats->ubrc;
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data[++i] = stats->ubtc;
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data[++i] = stats->mbrc;
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data[++i] = stats->mbtc;
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data[++i] = stats->bbrc;
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data[++i] = stats->bbtc;
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data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
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data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
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data[++i] = stats->dma_pkt_rc;
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data[++i] = stats->dma_pkt_tc;
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data[++i] = stats->dma_oct_rc;
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data[++i] = stats->dma_oct_tc;
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data[++i] = stats->dpc;
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i++;
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data += i;
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count = 0U;
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for (i = 0U, aq_vec = self->aq_vec[0];
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@ -768,7 +783,20 @@ void aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
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}
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err_exit:;
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(void)err;
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}
|
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|
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static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
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{
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struct net_device *ndev = self->ndev;
|
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struct aq_stats_s *stats = self->aq_hw_ops.hw_get_hw_stats(self->aq_hw);
|
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|
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ndev->stats.rx_packets = stats->uprc + stats->mprc + stats->bprc;
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ndev->stats.rx_bytes = stats->ubrc + stats->mbrc + stats->bbrc;
|
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ndev->stats.rx_errors = stats->erpr;
|
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ndev->stats.tx_packets = stats->uptc + stats->mptc + stats->bptc;
|
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ndev->stats.tx_bytes = stats->ubtc + stats->mbtc + stats->bbtc;
|
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ndev->stats.tx_errors = stats->erpt;
|
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ndev->stats.multicast = stats->mprc;
|
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}
|
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|
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void aq_nic_get_link_ksettings(struct aq_nic_s *self,
|
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|
|
|
@ -71,7 +71,7 @@ struct aq_nic_cfg_s {
|
|||
|
||||
struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
|
||||
const struct ethtool_ops *et_ops,
|
||||
struct device *dev,
|
||||
struct pci_dev *pdev,
|
||||
struct aq_pci_func_s *aq_pci_func,
|
||||
unsigned int port,
|
||||
const struct aq_hw_ops *aq_hw_ops);
|
||||
|
|
|
@ -51,7 +51,8 @@ struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *aq_hw_ops,
|
|||
pci_set_drvdata(pdev, self);
|
||||
self->pdev = pdev;
|
||||
|
||||
err = aq_hw_ops->get_hw_caps(NULL, &self->aq_hw_caps);
|
||||
err = aq_hw_ops->get_hw_caps(NULL, &self->aq_hw_caps, pdev->device,
|
||||
pdev->subsystem_device);
|
||||
if (err < 0)
|
||||
goto err_exit;
|
||||
|
||||
|
@ -59,7 +60,7 @@ struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *aq_hw_ops,
|
|||
|
||||
for (port = 0; port < self->ports; ++port) {
|
||||
struct aq_nic_s *aq_nic = aq_nic_alloc_cold(ndev_ops, eth_ops,
|
||||
&pdev->dev, self,
|
||||
pdev, self,
|
||||
port, aq_hw_ops);
|
||||
|
||||
if (!aq_nic) {
|
||||
|
|
|
@ -18,9 +18,20 @@
|
|||
#include "hw_atl_a0_internal.h"
|
||||
|
||||
static int hw_atl_a0_get_hw_caps(struct aq_hw_s *self,
|
||||
struct aq_hw_caps_s *aq_hw_caps)
|
||||
struct aq_hw_caps_s *aq_hw_caps,
|
||||
unsigned short device,
|
||||
unsigned short subsystem_device)
|
||||
{
|
||||
memcpy(aq_hw_caps, &hw_atl_a0_hw_caps_, sizeof(*aq_hw_caps));
|
||||
|
||||
if (device == HW_ATL_DEVICE_ID_D108 && subsystem_device == 0x0001)
|
||||
aq_hw_caps->link_speed_msk &= ~HW_ATL_A0_RATE_10G;
|
||||
|
||||
if (device == HW_ATL_DEVICE_ID_D109 && subsystem_device == 0x0001) {
|
||||
aq_hw_caps->link_speed_msk &= ~HW_ATL_A0_RATE_10G;
|
||||
aq_hw_caps->link_speed_msk &= ~HW_ATL_A0_RATE_5G;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -333,6 +344,10 @@ static int hw_atl_a0_hw_init(struct aq_hw_s *self,
|
|||
hw_atl_a0_hw_rss_set(self, &aq_nic_cfg->aq_rss);
|
||||
hw_atl_a0_hw_rss_hash_set(self, &aq_nic_cfg->aq_rss);
|
||||
|
||||
/* Reset link status and read out initial hardware counters */
|
||||
self->aq_link_status.mbps = 0;
|
||||
hw_atl_utils_update_stats(self);
|
||||
|
||||
err = aq_hw_err_from_flags(self);
|
||||
if (err < 0)
|
||||
goto err_exit;
|
||||
|
|
|
@ -16,11 +16,23 @@
|
|||
#include "hw_atl_utils.h"
|
||||
#include "hw_atl_llh.h"
|
||||
#include "hw_atl_b0_internal.h"
|
||||
#include "hw_atl_llh_internal.h"
|
||||
|
||||
static int hw_atl_b0_get_hw_caps(struct aq_hw_s *self,
|
||||
struct aq_hw_caps_s *aq_hw_caps)
|
||||
struct aq_hw_caps_s *aq_hw_caps,
|
||||
unsigned short device,
|
||||
unsigned short subsystem_device)
|
||||
{
|
||||
memcpy(aq_hw_caps, &hw_atl_b0_hw_caps_, sizeof(*aq_hw_caps));
|
||||
|
||||
if (device == HW_ATL_DEVICE_ID_D108 && subsystem_device == 0x0001)
|
||||
aq_hw_caps->link_speed_msk &= ~HW_ATL_B0_RATE_10G;
|
||||
|
||||
if (device == HW_ATL_DEVICE_ID_D109 && subsystem_device == 0x0001) {
|
||||
aq_hw_caps->link_speed_msk &= ~HW_ATL_B0_RATE_10G;
|
||||
aq_hw_caps->link_speed_msk &= ~HW_ATL_B0_RATE_5G;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -357,6 +369,7 @@ static int hw_atl_b0_hw_init(struct aq_hw_s *self,
|
|||
};
|
||||
|
||||
int err = 0;
|
||||
u32 val;
|
||||
|
||||
self->aq_nic_cfg = aq_nic_cfg;
|
||||
|
||||
|
@ -374,6 +387,20 @@ static int hw_atl_b0_hw_init(struct aq_hw_s *self,
|
|||
hw_atl_b0_hw_rss_set(self, &aq_nic_cfg->aq_rss);
|
||||
hw_atl_b0_hw_rss_hash_set(self, &aq_nic_cfg->aq_rss);
|
||||
|
||||
/* Force limit MRRS on RDM/TDM to 2K */
|
||||
val = aq_hw_read_reg(self, pci_reg_control6_adr);
|
||||
aq_hw_write_reg(self, pci_reg_control6_adr, (val & ~0x707) | 0x404);
|
||||
|
||||
/* TX DMA total request limit. B0 hardware is not capable to
|
||||
* handle more than (8K-MRRS) incoming DMA data.
|
||||
* Value 24 in 256byte units
|
||||
*/
|
||||
aq_hw_write_reg(self, tx_dma_total_req_limit_adr, 24);
|
||||
|
||||
/* Reset link status and read out initial hardware counters */
|
||||
self->aq_link_status.mbps = 0;
|
||||
hw_atl_utils_update_stats(self);
|
||||
|
||||
err = aq_hw_err_from_flags(self);
|
||||
if (err < 0)
|
||||
goto err_exit;
|
||||
|
|
|
@ -2343,6 +2343,9 @@
|
|||
#define tx_dma_desc_base_addrmsw_adr(descriptor) \
|
||||
(0x00007c04u + (descriptor) * 0x40)
|
||||
|
||||
/* tx dma total request limit */
|
||||
#define tx_dma_total_req_limit_adr 0x00007b20u
|
||||
|
||||
/* tx interrupt moderation control register definitions
|
||||
* Preprocessor definitions for TX Interrupt Moderation Control Register
|
||||
* Base Address: 0x00008980
|
||||
|
@ -2369,6 +2372,9 @@
|
|||
/* default value of bitfield reg_res_dsbl */
|
||||
#define pci_reg_res_dsbl_default 0x1
|
||||
|
||||
/* PCI core control register */
|
||||
#define pci_reg_control6_adr 0x1014u
|
||||
|
||||
/* global microprocessor scratch pad definitions */
|
||||
#define glb_cpu_scratch_scp_adr(scratch_scp) (0x00000300u + (scratch_scp) * 0x4)
|
||||
|
||||
|
|
|
@ -503,73 +503,43 @@ int hw_atl_utils_update_stats(struct aq_hw_s *self)
|
|||
struct hw_atl_s *hw_self = PHAL_ATLANTIC;
|
||||
struct hw_aq_atl_utils_mbox mbox;
|
||||
|
||||
if (!self->aq_link_status.mbps)
|
||||
return 0;
|
||||
|
||||
hw_atl_utils_mpi_read_stats(self, &mbox);
|
||||
|
||||
#define AQ_SDELTA(_N_) (hw_self->curr_stats._N_ += \
|
||||
mbox.stats._N_ - hw_self->last_stats._N_)
|
||||
if (self->aq_link_status.mbps) {
|
||||
AQ_SDELTA(uprc);
|
||||
AQ_SDELTA(mprc);
|
||||
AQ_SDELTA(bprc);
|
||||
AQ_SDELTA(erpt);
|
||||
|
||||
AQ_SDELTA(uprc);
|
||||
AQ_SDELTA(mprc);
|
||||
AQ_SDELTA(bprc);
|
||||
AQ_SDELTA(erpt);
|
||||
|
||||
AQ_SDELTA(uptc);
|
||||
AQ_SDELTA(mptc);
|
||||
AQ_SDELTA(bptc);
|
||||
AQ_SDELTA(erpr);
|
||||
|
||||
AQ_SDELTA(ubrc);
|
||||
AQ_SDELTA(ubtc);
|
||||
AQ_SDELTA(mbrc);
|
||||
AQ_SDELTA(mbtc);
|
||||
AQ_SDELTA(bbrc);
|
||||
AQ_SDELTA(bbtc);
|
||||
AQ_SDELTA(dpc);
|
||||
AQ_SDELTA(uptc);
|
||||
AQ_SDELTA(mptc);
|
||||
AQ_SDELTA(bptc);
|
||||
AQ_SDELTA(erpr);
|
||||
|
||||
AQ_SDELTA(ubrc);
|
||||
AQ_SDELTA(ubtc);
|
||||
AQ_SDELTA(mbrc);
|
||||
AQ_SDELTA(mbtc);
|
||||
AQ_SDELTA(bbrc);
|
||||
AQ_SDELTA(bbtc);
|
||||
AQ_SDELTA(dpc);
|
||||
}
|
||||
#undef AQ_SDELTA
|
||||
hw_self->curr_stats.dma_pkt_rc = stats_rx_dma_good_pkt_counterlsw_get(self);
|
||||
hw_self->curr_stats.dma_pkt_tc = stats_tx_dma_good_pkt_counterlsw_get(self);
|
||||
hw_self->curr_stats.dma_oct_rc = stats_rx_dma_good_octet_counterlsw_get(self);
|
||||
hw_self->curr_stats.dma_oct_tc = stats_tx_dma_good_octet_counterlsw_get(self);
|
||||
|
||||
memcpy(&hw_self->last_stats, &mbox.stats, sizeof(mbox.stats));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int hw_atl_utils_get_hw_stats(struct aq_hw_s *self,
|
||||
u64 *data, unsigned int *p_count)
|
||||
struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self)
|
||||
{
|
||||
struct hw_atl_s *hw_self = PHAL_ATLANTIC;
|
||||
struct hw_atl_stats_s *stats = &hw_self->curr_stats;
|
||||
int i = 0;
|
||||
|
||||
data[i] = stats->uprc + stats->mprc + stats->bprc;
|
||||
data[++i] = stats->uprc;
|
||||
data[++i] = stats->mprc;
|
||||
data[++i] = stats->bprc;
|
||||
data[++i] = stats->erpt;
|
||||
data[++i] = stats->uptc + stats->mptc + stats->bptc;
|
||||
data[++i] = stats->uptc;
|
||||
data[++i] = stats->mptc;
|
||||
data[++i] = stats->bptc;
|
||||
data[++i] = stats->ubrc;
|
||||
data[++i] = stats->ubtc;
|
||||
data[++i] = stats->mbrc;
|
||||
data[++i] = stats->mbtc;
|
||||
data[++i] = stats->bbrc;
|
||||
data[++i] = stats->bbtc;
|
||||
data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
|
||||
data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
|
||||
data[++i] = stats_rx_dma_good_pkt_counterlsw_get(self);
|
||||
data[++i] = stats_tx_dma_good_pkt_counterlsw_get(self);
|
||||
data[++i] = stats_rx_dma_good_octet_counterlsw_get(self);
|
||||
data[++i] = stats_tx_dma_good_octet_counterlsw_get(self);
|
||||
data[++i] = stats->dpc;
|
||||
|
||||
if (p_count)
|
||||
*p_count = ++i;
|
||||
|
||||
return 0;
|
||||
return &PHAL_ATLANTIC->curr_stats;
|
||||
}
|
||||
|
||||
static const u32 hw_atl_utils_hw_mac_regs[] = {
|
||||
|
|
|
@ -129,7 +129,7 @@ struct __packed hw_aq_atl_utils_mbox {
|
|||
struct __packed hw_atl_s {
|
||||
struct aq_hw_s base;
|
||||
struct hw_atl_stats_s last_stats;
|
||||
struct hw_atl_stats_s curr_stats;
|
||||
struct aq_stats_s curr_stats;
|
||||
u64 speed;
|
||||
unsigned int chip_features;
|
||||
u32 fw_ver_actual;
|
||||
|
@ -207,8 +207,6 @@ int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version);
|
|||
|
||||
int hw_atl_utils_update_stats(struct aq_hw_s *self);
|
||||
|
||||
int hw_atl_utils_get_hw_stats(struct aq_hw_s *self,
|
||||
u64 *data,
|
||||
unsigned int *p_count);
|
||||
struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self);
|
||||
|
||||
#endif /* HW_ATL_UTILS_H */
|
||||
|
|
|
@ -11,8 +11,10 @@
|
|||
#define VER_H
|
||||
|
||||
#define NIC_MAJOR_DRIVER_VERSION 1
|
||||
#define NIC_MINOR_DRIVER_VERSION 5
|
||||
#define NIC_BUILD_DRIVER_VERSION 345
|
||||
#define NIC_MINOR_DRIVER_VERSION 6
|
||||
#define NIC_BUILD_DRIVER_VERSION 13
|
||||
#define NIC_REVISION_DRIVER_VERSION 0
|
||||
|
||||
#define AQ_CFG_DRV_VERSION_SUFFIX "-kern"
|
||||
|
||||
#endif /* VER_H */
|
||||
|
|
Loading…
Reference in New Issue