mirror of https://gitee.com/openkylin/linux.git
Renesas sh-sci updates for v3.11
HSCIF support by Ulrich Hecht. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJRyqpMAAoJENfPZGlqN0++KbMP/3XPeCGPyiAvoEYFT68CTUE3 vtyVU5APL7rJ7eCkuxXvBriJ8GRcL95NUwK7kss3kPDpSTkNf4UmVCgrs1mj2gjl 8PxjxGzyeryDl/cILx1EOJYkmhm6TUjbeFrd2uFOxntbhItnCrEAHDwx7AxQhI79 Enz3L0moU1v8rq/MBiyGKh1wD2UFgyzcqbxhsdxhDurgbhElfnccWxjK9DVXxCAP c9Lyc0GIC5CniI+LITgcbay93/2//5/ytSQTc3gDfbNkVk/8sa4HWyV4XLDNNCAz EclVD9fLBXHITVtid6c/Nxqnn+6W31LKKsR52XDYs8anT61YxoO6QHzEiXPpzEvF 3NbR9Vv3EpgIe6NXn0JB5GwOvggJxWHNg9/8LspyZujtzS99fLe00L0ICEftfsVp 62wUnvC/477DuXr5e/o8YrSvWxnKq51tqoFthWUEn6FkjoUYC8eNuCAnvKrODf4i y5FokvDepmhElLFOFWuCDahPeSy512WKtsGNLKzulwLF0zEmpkAitw6gtE044fsk FLtaA8SpmdgbH0NiLW0jFuNR4w36vPZ2g7mCqWGlkAxMC9jlitfWDvSG+KssqEL6 ObgR3GyuYrHqVgB7vqGztqvZWekBSsQXdk5Y80mN15M+3qO5KwYjKo89U8lWMS4W zMq5g9o/qW7C9NnHCPA2 =bnU/ -----END PGP SIGNATURE----- Merge tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas sh-sci updates for v3.11 HSCIF support by Ulrich Hecht. * tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: shmobile: r8a7790: don't use external clock for SCIFs ARM: shmobile: r8a7790: HSCIF support serial: sh-sci: HSCIF support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
0ad578ef25
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@ -98,10 +98,18 @@ void __init r8a7790_pinmux_init(void)
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[index] = { \
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SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
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.scbrr_algo_id = SCBRR_ALGO_2, \
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
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.scscr = SCSCR_RE | SCSCR_TE, \
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}
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enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 };
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#define HSCIF_DATA(index, baseaddr, irq) \
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[index] = { \
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SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
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.scbrr_algo_id = SCBRR_ALGO_6, \
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.scscr = SCSCR_RE | SCSCR_TE, \
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}
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enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
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HSCIF0, HSCIF1 };
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static struct plat_sci_port scif[] __initdata = {
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SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
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@ -112,6 +120,8 @@ static struct plat_sci_port scif[] __initdata = {
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SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
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SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
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SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
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HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
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HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
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};
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static inline void r8a7790_register_scif(int idx)
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@ -149,6 +159,8 @@ void __init r8a7790_add_standard_devices(void)
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r8a7790_register_scif(SCIFA2);
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r8a7790_register_scif(SCIF0);
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r8a7790_register_scif(SCIF1);
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r8a7790_register_scif(HSCIF0);
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r8a7790_register_scif(HSCIF1);
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r8a7790_register_irqc(0);
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}
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@ -146,6 +146,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = sci_reg_invalid,
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -165,6 +166,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = sci_reg_invalid,
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -183,6 +185,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = sci_reg_invalid,
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -201,6 +204,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = { 0x3c, 16 },
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = sci_reg_invalid,
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -220,6 +224,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = { 0x20, 16 },
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[SCLSR] = { 0x24, 16 },
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -238,6 +243,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = sci_reg_invalid,
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -256,6 +262,26 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = { 0x20, 16 },
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[SCLSR] = { 0x24, 16 },
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[HSSRR] = sci_reg_invalid,
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},
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/*
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* Common HSCIF definitions.
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*/
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[SCIx_HSCIF_REGTYPE] = {
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[SCSMR] = { 0x00, 16 },
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[SCBRR] = { 0x04, 8 },
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[SCSCR] = { 0x08, 16 },
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[SCxTDR] = { 0x0c, 8 },
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[SCxSR] = { 0x10, 16 },
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[SCxRDR] = { 0x14, 8 },
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[SCFCR] = { 0x18, 16 },
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[SCFDR] = { 0x1c, 16 },
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[SCTFDR] = sci_reg_invalid,
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = { 0x20, 16 },
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[SCLSR] = { 0x24, 16 },
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[HSSRR] = { 0x40, 16 },
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},
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/*
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@ -275,6 +301,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = { 0x24, 16 },
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -294,6 +321,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = { 0x20, 16 },
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[SCSPTR] = { 0x24, 16 },
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[SCLSR] = { 0x28, 16 },
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[HSSRR] = sci_reg_invalid,
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},
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/*
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@ -313,6 +341,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
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[SCRFDR] = sci_reg_invalid,
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[SCSPTR] = sci_reg_invalid,
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[SCLSR] = sci_reg_invalid,
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[HSSRR] = sci_reg_invalid,
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},
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};
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@ -374,6 +403,9 @@ static int sci_probe_regmap(struct plat_sci_port *cfg)
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*/
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cfg->regtype = SCIx_SH4_SCIF_REGTYPE;
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break;
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case PORT_HSCIF:
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cfg->regtype = SCIx_HSCIF_REGTYPE;
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break;
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default:
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printk(KERN_ERR "Can't probe register map for given port\n");
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return -EINVAL;
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@ -1798,6 +1830,42 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
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return ((freq + 16 * bps) / (32 * bps) - 1);
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}
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/* calculate sample rate, BRR, and clock select for HSCIF */
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static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq,
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int *brr, unsigned int *srr,
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unsigned int *cks)
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{
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int sr, c, br, err;
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int min_err = 1000; /* 100% */
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/* Find the combination of sample rate and clock select with the
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smallest deviation from the desired baud rate. */
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for (sr = 8; sr <= 32; sr++) {
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for (c = 0; c <= 3; c++) {
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/* integerized formulas from HSCIF documentation */
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br = freq / (sr * (1 << (2 * c + 1)) * bps) - 1;
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if (br < 0 || br > 255)
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continue;
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err = freq / ((br + 1) * bps * sr *
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(1 << (2 * c + 1)) / 1000) - 1000;
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if (min_err > err) {
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min_err = err;
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*brr = br;
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*srr = sr - 1;
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*cks = c;
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}
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}
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}
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if (min_err == 1000) {
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WARN_ON(1);
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/* use defaults */
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*brr = 255;
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*srr = 15;
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*cks = 0;
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}
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}
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static void sci_reset(struct uart_port *port)
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{
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struct plat_sci_reg *reg;
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@ -1819,8 +1887,9 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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{
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struct sci_port *s = to_sci_port(port);
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struct plat_sci_reg *reg;
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unsigned int baud, smr_val, max_baud, cks;
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unsigned int baud, smr_val, max_baud, cks = 0;
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int t = -1;
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unsigned int srr = 15;
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/*
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* earlyprintk comes here early on with port->uartclk set to zero.
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@ -1833,8 +1902,17 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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max_baud = port->uartclk ? port->uartclk / 16 : 115200;
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baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
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if (likely(baud && port->uartclk))
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t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud, port->uartclk);
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if (likely(baud && port->uartclk)) {
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if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) {
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sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
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&cks);
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} else {
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t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud,
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port->uartclk);
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for (cks = 0; t >= 256 && cks <= 3; cks++)
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t >>= 2;
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}
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}
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sci_port_enable(s);
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@ -1853,15 +1931,15 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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uart_update_timeout(port, termios->c_cflag, baud);
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for (cks = 0; t >= 256 && cks <= 3; cks++)
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t >>= 2;
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dev_dbg(port->dev, "%s: SMR %x, cks %x, t %x, SCSCR %x\n",
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__func__, smr_val, cks, t, s->cfg->scscr);
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if (t >= 0) {
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serial_port_out(port, SCSMR, (smr_val & ~3) | cks);
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serial_port_out(port, SCBRR, t);
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reg = sci_getreg(port, HSSRR);
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if (reg->size)
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serial_port_out(port, HSSRR, srr | HSCIF_SRE);
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udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
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} else
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serial_port_out(port, SCSMR, smr_val);
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@ -1947,6 +2025,8 @@ static const char *sci_type(struct uart_port *port)
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return "scifa";
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case PORT_SCIFB:
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return "scifb";
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case PORT_HSCIF:
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return "hscif";
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}
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return NULL;
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@ -1960,7 +2040,10 @@ static inline unsigned long sci_port_size(struct uart_port *port)
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* from platform resource data at such a time that ports begin to
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* behave more erratically.
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*/
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return 64;
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if (port->type == PORT_HSCIF)
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return 96;
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else
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return 64;
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}
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static int sci_remap_port(struct uart_port *port)
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@ -2085,6 +2168,9 @@ static int sci_init_single(struct platform_device *dev,
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case PORT_SCIFB:
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port->fifosize = 256;
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break;
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case PORT_HSCIF:
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port->fifosize = 128;
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break;
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case PORT_SCIFA:
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port->fifosize = 64;
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break;
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@ -2325,7 +2411,7 @@ static inline int sci_probe_earlyprintk(struct platform_device *pdev)
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#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
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static char banner[] __initdata =
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KERN_INFO "SuperH SCI(F) driver initialized\n";
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KERN_INFO "SuperH (H)SCI(F) driver initialized\n";
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static struct uart_driver sci_uart_driver = {
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.owner = THIS_MODULE,
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@ -2484,4 +2570,4 @@ module_exit(sci_exit);
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:sh-sci");
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MODULE_AUTHOR("Paul Mundt");
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MODULE_DESCRIPTION("SuperH SCI(F) serial driver");
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MODULE_DESCRIPTION("SuperH (H)SCI(F) serial driver");
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@ -5,7 +5,7 @@
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#include <linux/sh_dma.h>
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/*
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* Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
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* Generic header for SuperH (H)SCI(F) (used by sh/sh64/h8300 and related parts)
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*/
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#define SCIx_NOT_SUPPORTED (-1)
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@ -16,6 +16,7 @@ enum {
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SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
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SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
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SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */
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SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */
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};
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#define SCSCR_TIE (1 << 7)
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@ -37,7 +38,7 @@ enum {
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#define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
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/* SCxSR SCIF */
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/* SCxSR SCIF, HSCIF */
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#define SCIF_ER 0x0080
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#define SCIF_TEND 0x0040
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#define SCIF_TDFE 0x0020
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@ -55,6 +56,9 @@ enum {
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#define SCSPTR_SPB2IO (1 << 1)
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#define SCSPTR_SPB2DT (1 << 0)
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/* HSSRR HSCIF */
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#define HSCIF_SRE 0x8000
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/* Offsets into the sci_port->irqs array */
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enum {
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SCIx_ERI_IRQ,
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@ -90,6 +94,7 @@ enum {
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SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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SCIx_SH4_SCIF_FIFODATA_REGTYPE,
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SCIx_SH7705_SCIF_REGTYPE,
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SCIx_HSCIF_REGTYPE,
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SCIx_NR_REGTYPES,
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};
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@ -115,6 +120,7 @@ enum {
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SCSMR, SCBRR, SCSCR, SCxSR,
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SCFCR, SCFDR, SCxTDR, SCxRDR,
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SCLSR, SCTFDR, SCRFDR, SCSPTR,
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HSSRR,
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SCIx_NR_REGS,
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};
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@ -137,7 +143,7 @@ struct plat_sci_port {
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unsigned long mapbase; /* resource base */
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unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
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unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */
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unsigned int type; /* SCI / SCIF / IRDA */
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unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
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upf_t flags; /* UPF_* flags */
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unsigned long capabilities; /* Port features/capabilities */
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@ -226,4 +226,7 @@
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/* Rocketport EXPRESS/INFINITY */
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#define PORT_RP2 102
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/* SH-SCI */
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#define PORT_HSCIF 103
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#endif /* _UAPILINUX_SERIAL_CORE_H */
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Reference in New Issue