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ARM: dts: rockchip: add cpu enable method for rk3228 SoC 

This patch sets PSCI as the default cpu enable-method for RK3228 SoC.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Frank Wang 2017-06-22 18:29:56 +08:00 committed by Heiko Stuebner
parent ec6ca8e172
commit 0ae92144c6
1 changed files with 9 additions and 0 deletions
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9
arch/arm/boot/dts/rk322x.dtsi
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@ -70,6 +70,7 @@ cpu0: cpu@f00 {
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
enable-method = "psci";
};
cpu1: cpu@f01 {
@ -78,6 +79,7 @@ cpu1: cpu@f01 {
reg = <0xf01>;
resets = <&cru SRST_CORE1>;
operating-points-v2 = <&cpu0_opp_table>;
enable-method = "psci";
};
cpu2: cpu@f02 {
@ -86,6 +88,7 @@ cpu2: cpu@f02 {
reg = <0xf02>;
resets = <&cru SRST_CORE2>;
operating-points-v2 = <&cpu0_opp_table>;
enable-method = "psci";
};
cpu3: cpu@f03 {
@ -94,6 +97,7 @@ cpu3: cpu@f03 {
reg = <0xf03>;
resets = <&cru SRST_CORE3>;
operating-points-v2 = <&cpu0_opp_table>;
enable-method = "psci";
};
};
@ -151,6 +155,11 @@ arm-pmu {
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv7-timer";
arm,cpu-registers-not-fw-configured;