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clk: imx8mq: Fix the CLKO2 source select list 

The CLKO2 clock source select list is the following as per the i.MX8M
Reference Manual:

000 - 25M_REF_CLK
001 - SYSTEM_PLL2_DIV5
010 - SYSTEM_PLL1_DIV2
011 - SYSTEM_PLL2_DIV6
100 - SYSTEM_PLL3_CLK
101 - AUDIO_PLL1_CLK
110 - VIDEO_PLL1_CLK
111 - 32K_REF_CLK

However, in imx8mq_clko2_sels[] only the first four entries are correct.

Fix it by adding the missing "sys3_pll2_out" entry in order to match
the description from the manual.

Fixes: b80522040c ("clk: imx: Add clock driver for i.MX8MQ CCM")
Reported-by: Rogerio Pimentel <rogerio.silva@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Fabio Estevam 2019-01-30 17:21:02 -02:00 committed by Stephen Boyd
parent 81bf81e7d3
commit 0bfed63baf
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/imx/clk-imx8mq.c
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@ -267,8 +267,8 @@ static const char * const imx8mq_ecspi3_sels[] = {"osc_25m", "sys2_pll_200m", "s
"sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
static const char * const imx8mq_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m", "audio_pll1_out",
"video_pll1_out", "ckil", };
static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m",
"sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "ckil", };
static struct clk_onecell_data clk_data;