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staging: comedi: addi_apci_3120: rename APCI3120_TIMER_VALUE 

For aesthetics, rename this register offset.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2014-11-04 10:53:51 -07:00 committed by Greg Kroah-Hartman
parent dd62c4373a
commit 0c188e9cc9
2 changed files with 5 additions and 5 deletions
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9
drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c
View File

@ -149,7 +149,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY
#define APCI3120_TIMER_CRT1 0x0c #define APCI3120_TIMER_CRT1 0x0c
#define APCI3120_TIMER_VALUE 0x04
#define APCI3120_TIMER_STATUS_REGISTER 0x0d #define APCI3120_TIMER_STATUS_REGISTER 0x0d
#define APCI3120_RD_STATUS 0x02 #define APCI3120_RD_STATUS 0x02
#define APCI3120_WR_ADDRESS 0x00 #define APCI3120_WR_ADDRESS 0x00
@ -191,14 +190,14 @@ static void apci3120_timer_write(struct comedi_device *dev,
outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) | outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) |
APCI3120_CTR0_TIMER_SEL(timer), APCI3120_CTR0_TIMER_SEL(timer),
dev->iobase + APCI3120_CTR0_REG); dev->iobase + APCI3120_CTR0_REG);
outw(val & 0xffff, dev->iobase + APCI3120_TIMER_VALUE); outw(val & 0xffff, dev->iobase + APCI3120_TIMER_REG);
if (timer == 2) { if (timer == 2) {
/* write upper 16-bits to timer 2 */ /* write upper 16-bits to timer 2 */
outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) | outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) |
APCI3120_CTR0_TIMER_SEL(timer + 1), APCI3120_CTR0_TIMER_SEL(timer + 1),
dev->iobase + APCI3120_CTR0_REG); dev->iobase + APCI3120_CTR0_REG);
outw((val >> 16) & 0xffff, dev->iobase + APCI3120_TIMER_VALUE); outw((val >> 16) & 0xffff, dev->iobase + APCI3120_TIMER_REG);
} }
} }
@ -212,14 +211,14 @@ static unsigned int apci3120_timer_read(struct comedi_device *dev,
outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) | outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) |
APCI3120_CTR0_TIMER_SEL(timer), APCI3120_CTR0_TIMER_SEL(timer),
dev->iobase + APCI3120_CTR0_REG); dev->iobase + APCI3120_CTR0_REG);
val = inw(dev->iobase + APCI3120_TIMER_VALUE); val = inw(dev->iobase + APCI3120_TIMER_REG);
if (timer == 2) { if (timer == 2) {
/* read upper 16-bits from timer 2 */ /* read upper 16-bits from timer 2 */
outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) | outb(APCI3120_CTR0_DO_BITS(devpriv->do_bits) |
APCI3120_CTR0_TIMER_SEL(timer + 1), APCI3120_CTR0_TIMER_SEL(timer + 1),
dev->iobase + APCI3120_CTR0_REG); dev->iobase + APCI3120_CTR0_REG);
val |= (inw(dev->iobase + APCI3120_TIMER_VALUE) << 16); val |= (inw(dev->iobase + APCI3120_TIMER_REG) << 16);
} }
return val; return val;

1
drivers/staging/comedi/drivers/addi_apci_3120.c
View File

@ -16,6 +16,7 @@
* PCI BAR 1 register map (dev->iobase) * PCI BAR 1 register map (dev->iobase)
*/ */
#define APCI3120_STATUS_TO_VERSION(x) (((x) >> 4) & 0xf) #define APCI3120_STATUS_TO_VERSION(x) (((x) >> 4) & 0xf)
#define APCI3120_TIMER_REG 0x04
#define APCI3120_AO_REG(x) (0x08 + (((x) / 4) * 2)) #define APCI3120_AO_REG(x) (0x08 + (((x) / 4) * 2))
#define APCI3120_AO_MUX(x) (((x) & 0x3) << 14) #define APCI3120_AO_MUX(x) (((x) & 0x3) << 14)
#define APCI3120_AO_DATA(x) ((x) << 0) #define APCI3120_AO_DATA(x) ((x) << 0)