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usb: chipidea: operate on otgsc register in a general way 

Use a more general way to read and write otgsc register.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Li Jun 2014-04-23 15:56:38 +08:00 committed by Greg Kroah-Hartman
parent d03cccff9c
commit 0c33bf781a
4 changed files with 46 additions and 40 deletions
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16
drivers/usb/chipidea/core.c
View File

@ -393,7 +393,7 @@ static irqreturn_t ci_irq(int irq, void *data)
u32 otgsc = 0;
if (ci->is_otg)
otgsc = hw_read(ci, OP_OTGSC, ~0);
otgsc = hw_read_otgsc(ci, ~0);
/*
* Handle id change interrupt, it indicates device/host function
@ -401,7 +401,8 @@ static irqreturn_t ci_irq(int irq, void *data)
*/
if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
ci->id_event = true;
ci_clear_otg_interrupt(ci, OTGSC_IDIS);
/* Clear ID change irq status */
hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
disable_irq_nosync(ci->irq);
queue_work(ci->wq, &ci->work);
return IRQ_HANDLED;
@ -413,7 +414,8 @@ static irqreturn_t ci_irq(int irq, void *data)
*/
if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
ci->b_sess_valid_event = true;
ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
/* Clear BSV irq */
hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
disable_irq_nosync(ci->irq);
queue_work(ci->wq, &ci->work);
return IRQ_HANDLED;
@ -535,8 +537,9 @@ static void ci_get_otg_capable(struct ci_hdrc *ci)
== (DCCPARAMS_DC | DCCPARAMS_HC));
if (ci->is_otg) {
dev_dbg(ci->dev, "It is OTG capable controller\n");
ci_disable_otg_interrupt(ci, OTGSC_INT_EN_BITS);
ci_clear_otg_interrupt(ci, OTGSC_INT_STATUS_BITS);
/* Disable and clear all OTG irq */
hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
OTGSC_INT_STATUS_BITS);
}
}
@ -648,7 +651,8 @@ static int ci_hdrc_probe(struct platform_device *pdev)
*/
mdelay(2);
ci->role = ci_otg_role(ci);
ci_enable_otg_interrupt(ci, OTGSC_IDIE);
/* Enable ID change irq */
hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
} else {
/*
* If the controller is not OTG capable, but support

33
drivers/usb/chipidea/otg.c
View File

@ -23,14 +23,32 @@
#include "bits.h"
#include "otg.h"
/**
* hw_read_otgsc returns otgsc register bits value.
* @mask: bitfield mask
*/
u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
{
return hw_read(ci, OP_OTGSC, mask);
}
/**
* hw_write_otgsc updates target bits of OTGSC register.
* @mask: bitfield mask
* @data: to be written
*/
void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
{
hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
}
/**
* ci_otg_role - pick role based on ID pin state
* @ci: the controller
*/
enum ci_role ci_otg_role(struct ci_hdrc *ci)
{
u32 sts = hw_read(ci, OP_OTGSC, ~0);
enum ci_role role = sts & OTGSC_ID
enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
? CI_ROLE_GADGET
: CI_ROLE_HOST;
@ -39,14 +57,10 @@ enum ci_role ci_otg_role(struct ci_hdrc *ci)
void ci_handle_vbus_change(struct ci_hdrc *ci)
{
u32 otgsc;
if (!ci->is_otg)
return;
otgsc = hw_read(ci, OP_OTGSC, ~0);
if (otgsc & OTGSC_BSV)
if (hw_read_otgsc(ci, OTGSC_BSV))
usb_gadget_vbus_connect(&ci->gadget);
else
usb_gadget_vbus_disconnect(&ci->gadget);
@ -115,6 +129,7 @@ void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
flush_workqueue(ci->wq);
destroy_workqueue(ci->wq);
}
ci_disable_otg_interrupt(ci, OTGSC_INT_EN_BITS);
ci_clear_otg_interrupt(ci, OTGSC_INT_STATUS_BITS);
/* Disable all OTG irq and clear status */
hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
OTGSC_INT_STATUS_BITS);
}

18
drivers/usb/chipidea/otg.h
View File

@ -11,22 +11,8 @@
#ifndef __DRIVERS_USB_CHIPIDEA_OTG_H
#define __DRIVERS_USB_CHIPIDEA_OTG_H
static inline void ci_clear_otg_interrupt(struct ci_hdrc *ci, u32 bits)
{
/* Only clear request bits */
hw_write(ci, OP_OTGSC, OTGSC_INT_STATUS_BITS, bits);
}
static inline void ci_enable_otg_interrupt(struct ci_hdrc *ci, u32 bits)
{
hw_write(ci, OP_OTGSC, bits | OTGSC_INT_STATUS_BITS, bits);
}
static inline void ci_disable_otg_interrupt(struct ci_hdrc *ci, u32 bits)
{
hw_write(ci, OP_OTGSC, bits | OTGSC_INT_STATUS_BITS, 0);
}
u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask);
void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data);
int ci_hdrc_otg_init(struct ci_hdrc *ci);
void ci_hdrc_otg_destroy(struct ci_hdrc *ci);
enum ci_role ci_otg_role(struct ci_hdrc *ci);

19
drivers/usb/chipidea/udc.c
View File

@ -1843,21 +1843,22 @@ void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
static int udc_id_switch_for_device(struct ci_hdrc *ci)
{
if (ci->is_otg) {
ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
ci_enable_otg_interrupt(ci, OTGSC_BSVIE);
}
if (ci->is_otg)
/* Clear and enable BSV irq */
hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
OTGSC_BSVIS | OTGSC_BSVIE);
return 0;
}
static void udc_id_switch_for_host(struct ci_hdrc *ci)
{
if (ci->is_otg) {
/* host doesn't care B_SESSION_VALID event */
ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
ci_disable_otg_interrupt(ci, OTGSC_BSVIE);
}
/*
* host doesn't care B_SESSION_VALID event
* so clear and disbale BSV irq
*/
if (ci->is_otg)
hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
}
/**