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drm/amdgpu: enable Doorbell support for Renoir (v2)
Add VCN range aperture to NBIO 7.0 v2: rebase (Alex) Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -91,6 +91,26 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
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WREG32(reg, doorbell_range);
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}
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static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
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int doorbell_index, int instance)
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{
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u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
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u32 doorbell_range = RREG32(reg);
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if (use_doorbell) {
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doorbell_range = REG_SET_FIELD(doorbell_range,
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BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
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doorbell_index);
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doorbell_range = REG_SET_FIELD(doorbell_range,
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BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8);
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} else
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doorbell_range = REG_SET_FIELD(doorbell_range,
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BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0);
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WREG32(reg, doorbell_range);
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}
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static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev,
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bool enable)
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{
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@ -282,6 +302,7 @@ const struct amdgpu_nbio_funcs nbio_v7_0_funcs = {
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.hdp_flush = nbio_v7_0_hdp_flush,
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.get_memsize = nbio_v7_0_get_memsize,
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.sdma_doorbell_range = nbio_v7_0_sdma_doorbell_range,
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.vcn_doorbell_range = nbio_v7_0_vcn_doorbell_range,
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.enable_doorbell_aperture = nbio_v7_0_enable_doorbell_aperture,
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.enable_doorbell_selfring_aperture = nbio_v7_0_enable_doorbell_selfring_aperture,
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.ih_doorbell_range = nbio_v7_0_ih_doorbell_range,
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@ -81,6 +81,10 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
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adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3;
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adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5;
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adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
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adev->doorbell_index.vcn.vcn_ring0_1 = AMDGPU_DOORBELL64_VCN0_1;
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adev->doorbell_index.vcn.vcn_ring2_3 = AMDGPU_DOORBELL64_VCN2_3;
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adev->doorbell_index.vcn.vcn_ring4_5 = AMDGPU_DOORBELL64_VCN4_5;
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adev->doorbell_index.vcn.vcn_ring6_7 = AMDGPU_DOORBELL64_VCN6_7;
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adev->doorbell_index.first_non_cp = AMDGPU_DOORBELL64_FIRST_NON_CP;
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adev->doorbell_index.last_non_cp = AMDGPU_DOORBELL64_LAST_NON_CP;
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