mirror of https://gitee.com/openkylin/linux.git
ath5k: revert AHB bus support removing
This reverts commit 093ec3c533.
AHB bus code has been removed, since we did not have support Atheros
AR231x SoC, required for building the AHB version of ath5k. Now that
support WiSoC chips added we can restore functionality back.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Acked-by: John W. Linville <linville@tuxdriver.com>
Cc: Jiri Slaby <jirislaby@gmail.com>
Cc: Nick Kossifidis <mickflemm@gmail.com>
Cc: "Luis R. Rodriguez" <mcgrof@do-not-panic.com>
Cc: linux-wireless@vger.kernel.org
Cc: ath5k-devel@lists.ath5k.org
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8247/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Sergey Ryazanov
Ralf Baechle
parent
3ed7a2a702
commit
0e5d3ab532
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@ -1,12 +1,13 @@
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config ATH5K
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tristate "Atheros 5xxx wireless cards support"
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depends on PCI && MAC80211
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depends on (PCI || ATHEROS_AR231X) && MAC80211
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select ATH_COMMON
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select MAC80211_LEDS
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select LEDS_CLASS
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select NEW_LEDS
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select AVERAGE
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select ATH5K_PCI
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select ATH5K_AHB if (ATHEROS_AR231X && !PCI)
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select ATH5K_PCI if (!ATHEROS_AR231X && PCI)
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---help---
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This module adds support for wireless adapters based on
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Atheros 5xxx chipset.
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@ -51,9 +52,16 @@ config ATH5K_TRACER
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If unsure, say N.
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config ATH5K_AHB
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bool "Atheros 5xxx AHB bus support"
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depends on (ATHEROS_AR231X && !PCI)
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---help---
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This adds support for WiSoC type chipsets of the 5xxx Atheros
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family.
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config ATH5K_PCI
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bool "Atheros 5xxx PCI bus support"
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depends on PCI
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depends on (!ATHEROS_AR231X && PCI)
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---help---
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This adds support for PCI type chipsets of the 5xxx Atheros
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family.
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@ -17,5 +17,6 @@ ath5k-y += ani.o
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ath5k-y += sysfs.o
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ath5k-y += mac80211-ops.o
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ath5k-$(CONFIG_ATH5K_DEBUG) += debug.o
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ath5k-$(CONFIG_ATH5K_AHB) += ahb.o
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ath5k-$(CONFIG_ATH5K_PCI) += pci.o
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obj-$(CONFIG_ATH5K) += ath5k.o
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@ -0,0 +1,234 @@
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/*
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* Copyright (c) 2008-2009 Atheros Communications Inc.
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* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/nl80211.h>
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#include <linux/platform_device.h>
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#include <linux/etherdevice.h>
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#include <linux/export.h>
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#include <ar231x_platform.h>
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#include "ath5k.h"
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#include "debug.h"
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#include "base.h"
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#include "reg.h"
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/* return bus cachesize in 4B word units */
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static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
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{
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*csz = L1_CACHE_BYTES >> 2;
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}
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static bool
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ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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{
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struct ath5k_hw *ah = common->priv;
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struct platform_device *pdev = to_platform_device(ah->dev);
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struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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u16 *eeprom, *eeprom_end;
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eeprom = (u16 *) bcfg->radio;
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eeprom_end = ((void *) bcfg->config) + BOARD_CONFIG_BUFSZ;
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eeprom += off;
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if (eeprom > eeprom_end)
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return false;
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*data = *eeprom;
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return true;
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}
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int ath5k_hw_read_srev(struct ath5k_hw *ah)
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{
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struct platform_device *pdev = to_platform_device(ah->dev);
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struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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ah->ah_mac_srev = bcfg->devid;
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return 0;
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}
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static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
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{
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struct platform_device *pdev = to_platform_device(ah->dev);
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struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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u8 *cfg_mac;
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if (to_platform_device(ah->dev)->id == 0)
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cfg_mac = bcfg->config->wlan0_mac;
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else
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cfg_mac = bcfg->config->wlan1_mac;
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memcpy(mac, cfg_mac, ETH_ALEN);
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return 0;
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}
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static const struct ath_bus_ops ath_ahb_bus_ops = {
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.ath_bus_type = ATH_AHB,
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.read_cachesize = ath5k_ahb_read_cachesize,
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.eeprom_read = ath5k_ahb_eeprom_read,
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.eeprom_read_mac = ath5k_ahb_eeprom_read_mac,
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};
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/*Initialization*/
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static int ath_ahb_probe(struct platform_device *pdev)
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{
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struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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struct ath5k_hw *ah;
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struct ieee80211_hw *hw;
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struct resource *res;
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void __iomem *mem;
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int irq;
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int ret = 0;
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u32 reg;
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if (!dev_get_platdata(&pdev->dev)) {
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dev_err(&pdev->dev, "no platform data specified\n");
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ret = -EINVAL;
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goto err_out;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "no memory resource found\n");
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ret = -ENXIO;
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goto err_out;
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}
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mem = ioremap_nocache(res->start, resource_size(res));
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if (mem == NULL) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err_out;
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}
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "no IRQ resource found\n");
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ret = -ENXIO;
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goto err_iounmap;
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}
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irq = res->start;
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hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
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if (hw == NULL) {
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dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
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ret = -ENOMEM;
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goto err_iounmap;
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}
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ah = hw->priv;
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ah->hw = hw;
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ah->dev = &pdev->dev;
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ah->iobase = mem;
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ah->irq = irq;
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ah->devid = bcfg->devid;
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if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
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/* Enable WMAC AHB arbitration */
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reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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reg |= AR5K_AR2315_AHB_ARB_CTL_WLAN;
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iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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/* Enable global WMAC swapping */
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reg = ioread32((void __iomem *) AR5K_AR2315_BYTESWAP);
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reg |= AR5K_AR2315_BYTESWAP_WMAC;
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iowrite32(reg, (void __iomem *) AR5K_AR2315_BYTESWAP);
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} else {
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/* Enable WMAC DMA access (assuming 5312 or 231x*/
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/* TODO: check other platforms */
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reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
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if (to_platform_device(ah->dev)->id == 0)
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reg |= AR5K_AR5312_ENABLE_WLAN0;
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else
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reg |= AR5K_AR5312_ENABLE_WLAN1;
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iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
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/*
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* On a dual-band AR5312, the multiband radio is only
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* used as pass-through. Disable 2 GHz support in the
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* driver for it
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*/
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if (to_platform_device(ah->dev)->id == 0 &&
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(bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
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(BD_WLAN1 | BD_WLAN0))
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ah->ah_capabilities.cap_needs_2GHz_ovr = true;
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else
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ah->ah_capabilities.cap_needs_2GHz_ovr = false;
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}
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ret = ath5k_init_ah(ah, &ath_ahb_bus_ops);
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if (ret != 0) {
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dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
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ret = -ENODEV;
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goto err_free_hw;
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}
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platform_set_drvdata(pdev, hw);
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return 0;
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err_free_hw:
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ieee80211_free_hw(hw);
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err_iounmap:
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iounmap(mem);
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err_out:
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return ret;
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}
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static int ath_ahb_remove(struct platform_device *pdev)
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{
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struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
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struct ieee80211_hw *hw = platform_get_drvdata(pdev);
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struct ath5k_hw *ah;
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u32 reg;
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if (!hw)
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return 0;
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ah = hw->priv;
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if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
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/* Disable WMAC AHB arbitration */
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reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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reg &= ~AR5K_AR2315_AHB_ARB_CTL_WLAN;
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iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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} else {
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/*Stop DMA access */
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reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
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if (to_platform_device(ah->dev)->id == 0)
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reg &= ~AR5K_AR5312_ENABLE_WLAN0;
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else
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reg &= ~AR5K_AR5312_ENABLE_WLAN1;
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iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
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}
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ath5k_deinit_ah(ah);
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iounmap(ah->iobase);
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ieee80211_free_hw(hw);
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return 0;
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}
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static struct platform_driver ath_ahb_driver = {
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.probe = ath_ahb_probe,
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.remove = ath_ahb_remove,
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.driver = {
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.name = "ar231x-wmac",
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.owner = THIS_MODULE,
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},
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};
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module_platform_driver(ath_ahb_driver);
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@ -1647,6 +1647,32 @@ static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
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return &(ath5k_hw_common(ah)->regulatory);
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}
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#ifdef CONFIG_ATHEROS_AR231X
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#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
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static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
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{
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/* On AR2315 and AR2317 the PCI clock domain registers
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* are outside of the WMAC register space */
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if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
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(ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
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return AR5K_AR2315_PCI_BASE + reg;
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return ah->iobase + reg;
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}
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static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
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{
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return ioread32(ath5k_ahb_reg(ah, reg));
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}
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static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
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{
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iowrite32(val, ath5k_ahb_reg(ah, reg));
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}
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#else
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static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
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{
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return ioread32(ah->iobase + reg);
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@ -1657,6 +1683,8 @@ static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
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iowrite32(val, ah->iobase + reg);
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}
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#endif
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static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
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{
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return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
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@ -99,6 +99,15 @@ static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
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/* Known SREVs */
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static const struct ath5k_srev_name srev_names[] = {
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#ifdef CONFIG_ATHEROS_AR231X
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{ "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },
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{ "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },
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{ "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },
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{ "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },
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{ "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },
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{ "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },
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{ "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },
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#else
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{ "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
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{ "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
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{ "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
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@ -117,6 +126,7 @@ static const struct ath5k_srev_name srev_names[] = {
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{ "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 },
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{ "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 },
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{ "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 },
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#endif
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{ "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },
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{ "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
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{ "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
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@ -132,6 +142,10 @@ static const struct ath5k_srev_name srev_names[] = {
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{ "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },
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{ "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },
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{ "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },
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#ifdef CONFIG_ATHEROS_AR231X
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{ "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
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{ "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
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#endif
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{ "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
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};
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@ -163,14 +163,20 @@ int ath5k_init_leds(struct ath5k_hw *ah)
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{
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int ret = 0;
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struct ieee80211_hw *hw = ah->hw;
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#ifndef CONFIG_ATHEROS_AR231X
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struct pci_dev *pdev = ah->pdev;
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#endif
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char name[ATH5K_LED_MAX_NAME_LEN + 1];
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const struct pci_device_id *match;
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if (!ah->pdev)
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return 0;
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#ifdef CONFIG_ATHEROS_AR231X
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match = NULL;
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#else
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match = pci_match_id(&ath5k_led_devices[0], pdev);
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#endif
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if (match) {
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__set_bit(ATH_STAT_LEDSOFT, ah->status);
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ah->led_pin = ATH_PIN(match->driver_data);
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