mirror of https://gitee.com/openkylin/linux.git
dma: mv_xor: Remove all interrupt magic numbers
This commit replaces the current magic numbers in the interrupt handling with proper macros, which makes more readable and self-documenting. While here replace the BUG() with a noisy WARN_ON(). There's no reason to tear down the entire system for an DMA IRQ error. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -50,9 +50,9 @@ static void mv_desc_init(struct mv_xor_desc_slot *desc,
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{
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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hw_desc->status = (1 << 31);
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hw_desc->status = XOR_DESC_DMA_OWNED;
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hw_desc->phy_next_desc = 0;
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hw_desc->desc_command = (1 << 31);
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hw_desc->desc_command = XOR_DESC_EOD_INT_EN;
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hw_desc->phy_dest_addr = addr;
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hw_desc->byte_count = byte_count;
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}
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@ -105,17 +105,9 @@ static u32 mv_chan_get_intr_cause(struct mv_xor_chan *chan)
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return intr_cause;
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}
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static int mv_is_err_intr(u32 intr_cause)
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{
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if (intr_cause & ((1<<4)|(1<<5)|(1<<6)|(1<<7)|(1<<8)|(1<<9)))
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return 1;
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return 0;
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}
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static void mv_xor_device_clear_eoc_cause(struct mv_xor_chan *chan)
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{
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u32 val = ~(1 << (chan->idx * 16));
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u32 val = ~(XOR_INT_END_OF_DESC << (chan->idx * 16));
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dev_dbg(mv_chan_to_devp(chan), "%s, val 0x%08x\n", __func__, val);
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writel_relaxed(val, XOR_INTR_CAUSE(chan));
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}
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@ -627,18 +619,16 @@ static void mv_dump_xor_regs(struct mv_xor_chan *chan)
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static void mv_xor_err_interrupt_handler(struct mv_xor_chan *chan,
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u32 intr_cause)
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{
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if (intr_cause & (1 << 4)) {
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dev_dbg(mv_chan_to_devp(chan),
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"ignore this error\n");
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return;
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if (intr_cause & XOR_INT_ERR_DECODE) {
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dev_dbg(mv_chan_to_devp(chan), "ignoring address decode error\n");
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return;
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}
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dev_err(mv_chan_to_devp(chan),
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"error on chan %d. intr cause 0x%08x\n",
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dev_err(mv_chan_to_devp(chan), "error on chan %d. intr cause 0x%08x\n",
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chan->idx, intr_cause);
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mv_dump_xor_regs(chan);
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BUG();
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WARN_ON(1);
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}
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static irqreturn_t mv_xor_interrupt_handler(int irq, void *data)
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@ -648,7 +638,7 @@ static irqreturn_t mv_xor_interrupt_handler(int irq, void *data)
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dev_dbg(mv_chan_to_devp(chan), "intr cause %x\n", intr_cause);
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if (mv_is_err_intr(intr_cause))
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if (intr_cause & XOR_INTR_ERRORS)
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mv_xor_err_interrupt_handler(chan, intr_cause);
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tasklet_schedule(&chan->irq_tasklet);
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@ -34,6 +34,9 @@
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#define XOR_OPERATION_MODE_MEMCPY 2
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#define XOR_DESCRIPTOR_SWAP BIT(14)
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#define XOR_DESC_DMA_OWNED BIT(31)
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#define XOR_DESC_EOD_INT_EN BIT(31)
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#define XOR_CURR_DESC(chan) (chan->mmr_high_base + 0x10 + (chan->idx * 4))
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#define XOR_NEXT_DESC(chan) (chan->mmr_high_base + 0x00 + (chan->idx * 4))
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#define XOR_BYTE_COUNT(chan) (chan->mmr_high_base + 0x20 + (chan->idx * 4))
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@ -48,7 +51,24 @@
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#define XOR_INTR_MASK(chan) (chan->mmr_base + 0x40)
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#define XOR_ERROR_CAUSE(chan) (chan->mmr_base + 0x50)
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#define XOR_ERROR_ADDR(chan) (chan->mmr_base + 0x60)
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#define XOR_INTR_MASK_VALUE 0x3F5
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#define XOR_INT_END_OF_DESC BIT(0)
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#define XOR_INT_END_OF_CHAIN BIT(1)
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#define XOR_INT_STOPPED BIT(2)
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#define XOR_INT_PAUSED BIT(3)
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#define XOR_INT_ERR_DECODE BIT(4)
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#define XOR_INT_ERR_RDPROT BIT(5)
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#define XOR_INT_ERR_WRPROT BIT(6)
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#define XOR_INT_ERR_OWN BIT(7)
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#define XOR_INT_ERR_PAR BIT(8)
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#define XOR_INT_ERR_MBUS BIT(9)
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#define XOR_INTR_ERRORS (XOR_INT_ERR_DECODE | XOR_INT_ERR_RDPROT | \
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XOR_INT_ERR_WRPROT | XOR_INT_ERR_OWN | \
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XOR_INT_ERR_PAR | XOR_INT_ERR_MBUS)
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#define XOR_INTR_MASK_VALUE (XOR_INT_END_OF_DESC | \
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XOR_INT_STOPPED | XOR_INTR_ERRORS)
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#define WINDOW_BASE(w) (0x50 + ((w) << 2))
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#define WINDOW_SIZE(w) (0x70 + ((w) << 2))
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