openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge tag 'mvebu-dt-3.15-5' of git://git.infradead.org/linux-mvebu into next/dt 

Merge "mvebu dt changes for v3.15 (incremental #5)" from Jason Cooper:

 - mvebu

    - 38x
       - add 2GHz fixed clock, core divider clock, and nand controller

    - 385
       - add nand controller and partitions to 385-DB board

* tag 'mvebu-dt-3.15-5' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: Enable NAND controller in Armada 385-DB
  ARM: mvebu: Add support for NAND controller in Armada 38x SoC
  ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
  ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2014-03-17 11:08:40 +01:00
parent 64d865f403 4de29e6369
commit 0f4d5641a6
2 changed files with 46 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
arch/arm/boot/dts/armada-385-db.dts
View File

@ -80,6 +80,27 @@ phy1: ethernet-phy@1 {
reg = <1>;
};
};
flash@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
pcie-controller {

25
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -337,10 +337,35 @@ mdio {
compatible = "marvell,orion-mdio";
reg = <0x72004 0x4>;
};
coredivclk: clock@e4250 {
compatible = "marvell,armada-380-corediv-clock";
reg = <0xe4250 0xc>;
#clock-cells = <1>;
clocks = <&mainpll>;
clock-output-names = "nand";
};
flash@d0000 {
compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&coredivclk 0>;
status = "disabled";
};
};
};
clocks {
/* 2 GHz fixed main PLL */
mainpll: mainpll {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2000000000>;
};
/* 25 MHz reference crystal */
refclk: oscillator {
compatible = "fixed-clock";