mirror of https://gitee.com/openkylin/linux.git
drm/i915: Disable trickle feed for gen2/3
My 830 is unhappy with trickle feed enabled. The symptom is that the image on the screen shifts a bit to right occasionally. The BIOS initially disables trickle feed, but it gets reset during suspend, so we need to re-disable it ourselves. Juse disable it always. Also disable it for all other gen2/3 platforms since we disable it for all more recent platforms as well (until HSW that is). At least my 855 doesn't seem to mind us doing this. I don't have gen3 hardware to test that. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1272,6 +1272,10 @@ enum punit_power_well {
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#define INSTPM_TLB_INVALIDATE (1<<9)
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#define INSTPM_SYNC_FLUSH (1<<5)
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#define ACTHD 0x020c8
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#define MEM_MODE 0x020cc
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#define MEM_DISPLAY_B_TRICKLE_FEED_DISABLE (1<<3) /* 830 only */
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#define MEM_DISPLAY_A_TRICKLE_FEED_DISABLE (1<<2) /* 830/845 only */
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#define MEM_DISPLAY_TRICKLE_FEED_DISABLE (1<<2) /* 85x only */
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#define FW_BLC 0x020d8
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#define FW_BLC2 0x020dc
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#define FW_BLC_SELF 0x020e0 /* 915+ only */
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@ -6138,6 +6138,9 @@ static void gen3_init_clock_gating(struct drm_device *dev)
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/* On GEN3 we really need to make sure the ARB C3 LP bit is set */
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I915_WRITE(MI_ARB_STATE, _MASKED_BIT_ENABLE(MI_ARB_C3_LP_WRITE_ENABLE));
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I915_WRITE(MI_ARB_STATE,
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_MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));
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}
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static void i85x_init_clock_gating(struct drm_device *dev)
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@ -6149,6 +6152,9 @@ static void i85x_init_clock_gating(struct drm_device *dev)
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/* interrupts should cause a wake up from C3 */
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I915_WRITE(MI_STATE, _MASKED_BIT_ENABLE(MI_AGPBUSY_INT_EN) |
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_MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE));
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I915_WRITE(MEM_MODE,
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_MASKED_BIT_ENABLE(MEM_DISPLAY_TRICKLE_FEED_DISABLE));
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}
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static void i830_init_clock_gating(struct drm_device *dev)
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@ -6156,6 +6162,10 @@ static void i830_init_clock_gating(struct drm_device *dev)
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struct drm_i915_private *dev_priv = dev->dev_private;
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I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
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I915_WRITE(MEM_MODE,
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_MASKED_BIT_ENABLE(MEM_DISPLAY_A_TRICKLE_FEED_DISABLE) |
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_MASKED_BIT_ENABLE(MEM_DISPLAY_B_TRICKLE_FEED_DISABLE));
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}
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void intel_init_clock_gating(struct drm_device *dev)
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