mirror of https://gitee.com/openkylin/linux.git
hpsa: clean up driver init
Improve initialization error handling in hpsa_init_one Clean up style and indent issues Rename functions for consistency Improve error messaging on allocations Fix return status from hpsa_put_ctlr_into_performant_mode Correct free order in hpsa_init_one using new function hpsa_free_performant_mode Prevent inadvertent use of null pointers by nulling out the parent structures and zeroing out associated size variables. Reviewed-by: Scott Teel <scott.teel@pmcs.com> Reviewed-by: Kevin Barnett <kevin.barnett@pmcs.com> Reviewed-by: Tomas Henzl <thenzl@redhat.com> Reviewed-by: Hannes Reinecke <hare@Suse.de> Signed-off-by: Robert Elliott <elliott@hp.com> Signed-off-by: Don Brace <don.brace@pmcs.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: James Bottomley <JBottomley@Odin.com>
This commit is contained in:
parent
2dd02d7425
commit
105a3dbc74
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@ -234,9 +234,8 @@ static void check_ioctl_unit_attention(struct ctlr_info *h,
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/* performant mode helper functions */
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static void calc_bucket_map(int *bucket, int num_buckets,
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int nsgs, int min_blocks, u32 *bucket_map);
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static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
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static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h);
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static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h);
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static void hpsa_free_performant_mode(struct ctlr_info *h);
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static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
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static inline u32 next_command(struct ctlr_info *h, u8 q);
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static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
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u32 *cfg_base_addr, u64 *cfg_base_addr_index,
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@ -1630,6 +1629,7 @@ static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
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* since it didn't get added to scsi mid layer
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*/
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fixup_botched_add(h, added[i]);
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added[i] = NULL;
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}
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free_and_out:
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@ -1753,7 +1753,7 @@ static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
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h->cmd_sg_list = NULL;
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}
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static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
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static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
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{
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int i;
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@ -6435,9 +6435,11 @@ static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
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if (h->msix_vector) {
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if (h->pdev->msix_enabled)
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pci_disable_msix(h->pdev);
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h->msix_vector = 0;
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} else if (h->msi_vector) {
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if (h->pdev->msi_enabled)
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pci_disable_msi(h->pdev);
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h->msi_vector = 0;
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}
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}
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@ -6576,10 +6578,14 @@ static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
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static void hpsa_free_cfgtables(struct ctlr_info *h)
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{
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if (h->transtable)
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if (h->transtable) {
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iounmap(h->transtable);
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if (h->cfgtable)
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h->transtable = NULL;
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}
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if (h->cfgtable) {
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iounmap(h->cfgtable);
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h->cfgtable = NULL;
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}
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}
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/* Find and map CISS config table and transfer table
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@ -6796,6 +6802,7 @@ static void hpsa_free_pci_init(struct ctlr_info *h)
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{
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hpsa_free_cfgtables(h); /* pci_init 4 */
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iounmap(h->vaddr); /* pci_init 3 */
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h->vaddr = NULL;
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hpsa_disable_interrupt_mode(h); /* pci_init 2 */
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pci_release_regions(h->pdev); /* pci_init 2 */
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pci_disable_device(h->pdev); /* pci_init 1 */
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@ -6866,6 +6873,7 @@ static int hpsa_pci_init(struct ctlr_info *h)
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hpsa_free_cfgtables(h);
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clean3: /* vaddr, intmode+region, pci */
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iounmap(h->vaddr);
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h->vaddr = NULL;
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clean2: /* intmode+region, pci */
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hpsa_disable_interrupt_mode(h);
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pci_release_regions(h->pdev);
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@ -6955,16 +6963,23 @@ static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
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static void hpsa_free_cmd_pool(struct ctlr_info *h)
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{
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kfree(h->cmd_pool_bits);
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if (h->cmd_pool)
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h->cmd_pool_bits = NULL;
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if (h->cmd_pool) {
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pci_free_consistent(h->pdev,
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h->nr_cmds * sizeof(struct CommandList),
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h->cmd_pool,
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h->cmd_pool_dhandle);
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if (h->errinfo_pool)
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h->cmd_pool = NULL;
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h->cmd_pool_dhandle = 0;
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}
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if (h->errinfo_pool) {
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pci_free_consistent(h->pdev,
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h->nr_cmds * sizeof(struct ErrorInfo),
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h->errinfo_pool,
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h->errinfo_pool_dhandle);
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h->errinfo_pool = NULL;
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h->errinfo_pool_dhandle = 0;
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}
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}
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static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
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@ -7012,12 +7027,14 @@ static void hpsa_free_irqs(struct ctlr_info *h)
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i = h->intr_mode;
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irq_set_affinity_hint(h->intr[i], NULL);
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free_irq(h->intr[i], &h->q[i]);
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h->q[i] = 0;
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return;
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}
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for (i = 0; i < h->msix_vector; i++) {
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irq_set_affinity_hint(h->intr[i], NULL);
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free_irq(h->intr[i], &h->q[i]);
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h->q[i] = 0;
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}
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for (; i < MAX_REPLY_QUEUES; i++)
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h->q[i] = 0;
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@ -7070,6 +7087,7 @@ static int hpsa_request_irqs(struct ctlr_info *h,
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intxhandler, IRQF_SHARED, h->devname,
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&h->q[h->intr_mode]);
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}
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irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
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}
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if (rc) {
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dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
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@ -7114,23 +7132,17 @@ static void hpsa_free_reply_queues(struct ctlr_info *h)
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h->reply_queue[i].head = NULL;
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h->reply_queue[i].busaddr = 0;
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}
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h->reply_queue_size = 0;
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}
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static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
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{
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hpsa_free_irqs(h);
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hpsa_free_sg_chain_blocks(h);
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hpsa_free_cmd_pool(h);
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kfree(h->blockFetchTable); /* perf 2 */
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hpsa_free_reply_queues(h); /* perf 1 */
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hpsa_free_ioaccel1_cmd_and_bft(h); /* perf 1 */
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hpsa_free_ioaccel2_cmd_and_bft(h); /* perf 1 */
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hpsa_free_cfgtables(h); /* pci_init 4 */
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iounmap(h->vaddr); /* pci_init 3 */
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hpsa_disable_interrupt_mode(h); /* pci_init 2 */
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pci_disable_device(h->pdev);
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pci_release_regions(h->pdev); /* pci_init 2 */
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kfree(h);
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hpsa_free_performant_mode(h); /* init_one 7 */
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hpsa_free_sg_chain_blocks(h); /* init_one 6 */
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hpsa_free_cmd_pool(h); /* init_one 5 */
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hpsa_free_irqs(h); /* init_one 4 */
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hpsa_free_pci_init(h); /* init_one 3 */
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kfree(h); /* init_one 1 */
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}
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/* Called when controller lockup detected. */
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@ -7403,10 +7415,13 @@ static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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*/
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BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
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h = kzalloc(sizeof(*h), GFP_KERNEL);
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if (!h)
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if (!h) {
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dev_err(&pdev->dev, "Failed to allocate controller head\n");
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return -ENOMEM;
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}
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h->pdev = pdev;
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h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
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INIT_LIST_HEAD(&h->offline_device_list);
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spin_lock_init(&h->lock);
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@ -7424,20 +7439,21 @@ static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
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if (!h->resubmit_wq) {
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rc = -ENOMEM;
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goto clean1;
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goto clean1; /* aer/h */
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}
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/* Allocate and clear per-cpu variable lockup_detected */
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h->lockup_detected = alloc_percpu(u32);
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if (!h->lockup_detected) {
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dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
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rc = -ENOMEM;
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goto clean1;
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goto clean1; /* wq/aer/h */
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}
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set_lockup_detected_for_all_cpus(h, 0);
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rc = hpsa_pci_init(h);
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if (rc != 0)
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goto clean1;
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if (rc)
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goto clean2; /* lockup, wq/aer/h */
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sprintf(h->devname, HPSA "%d", number_of_controllers);
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h->ctlr = number_of_controllers;
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@ -7453,23 +7469,25 @@ static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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dac = 0;
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} else {
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dev_err(&pdev->dev, "no suitable DMA available\n");
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goto clean2;
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goto clean3; /* pci, lockup, wq/aer/h */
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}
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}
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/* make sure the board interrupts are off */
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h->access.set_intr_mask(h, HPSA_INTR_OFF);
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if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
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goto clean2;
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rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
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if (rc)
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goto clean3; /* pci, lockup, wq/aer/h */
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dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
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h->devname, pdev->device,
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h->intr[h->intr_mode], dac ? "" : " not");
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rc = hpsa_alloc_cmd_pool(h);
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if (rc)
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goto clean2_and_free_irqs;
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if (hpsa_allocate_sg_chain_blocks(h))
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goto clean4;
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goto clean4; /* irq, pci, lockup, wq/aer/h */
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rc = hpsa_alloc_sg_chain_blocks(h);
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if (rc)
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goto clean5; /* cmd, irq, pci, lockup, wq/aer/h */
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init_waitqueue_head(&h->scan_wait_queue);
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init_waitqueue_head(&h->abort_cmd_wait_queue);
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h->scan_finished = 1; /* no scan currently in progress */
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@ -7479,9 +7497,12 @@ static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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h->hba_mode_enabled = 0;
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h->scsi_host = NULL;
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spin_lock_init(&h->devlock);
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hpsa_put_ctlr_into_performant_mode(h);
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rc = hpsa_put_ctlr_into_performant_mode(h);
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if (rc)
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goto clean6; /* sg, cmd, irq, pci, lockup, wq/aer/h */
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/* At this point, the controller is ready to take commands.
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/*
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* At this point, the controller is ready to take commands.
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* Now, if reset_devices and the hard reset didn't work, try
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* the soft reset and see if that works.
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*/
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@ -7536,17 +7557,17 @@ static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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goto reinit_after_soft_reset;
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}
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/* Enable Accelerated IO path at driver layer */
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h->acciopath_status = 1;
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/* Enable Accelerated IO path at driver layer */
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h->acciopath_status = 1;
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/* Turn the interrupts on so we can service requests */
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h->access.set_intr_mask(h, HPSA_INTR_ON);
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hpsa_hba_inquiry(h);
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rc = hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
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rc = hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
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if (rc)
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goto clean4;
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goto clean7;
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/* Monitor the controller for firmware lockups */
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h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
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@ -7558,22 +7579,32 @@ static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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h->heartbeat_sample_interval);
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return 0;
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clean4:
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clean7: /* perf, sg, cmd, irq, pci, lockup, wq/aer/h */
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kfree(h->hba_inquiry_data);
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hpsa_free_performant_mode(h);
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h->access.set_intr_mask(h, HPSA_INTR_OFF);
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clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
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hpsa_free_sg_chain_blocks(h);
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clean5: /* cmd, irq, pci, lockup, wq/aer/h */
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hpsa_free_cmd_pool(h);
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hpsa_free_ioaccel1_cmd_and_bft(h);
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hpsa_free_ioaccel2_cmd_and_bft(h);
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clean2_and_free_irqs:
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clean4: /* irq, pci, lockup, wq/aer/h */
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hpsa_free_irqs(h);
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clean2:
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clean3: /* pci, lockup, wq/aer/h */
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hpsa_free_pci_init(h);
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clean1:
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if (h->resubmit_wq)
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destroy_workqueue(h->resubmit_wq);
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if (h->rescan_ctlr_wq)
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destroy_workqueue(h->rescan_ctlr_wq);
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if (h->lockup_detected)
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clean2: /* lockup, wq/aer/h */
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if (h->lockup_detected) {
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free_percpu(h->lockup_detected);
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h->lockup_detected = NULL;
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}
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clean1: /* wq/aer/h */
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if (h->resubmit_wq) {
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destroy_workqueue(h->resubmit_wq);
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h->resubmit_wq = NULL;
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}
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if (h->rescan_ctlr_wq) {
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destroy_workqueue(h->rescan_ctlr_wq);
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h->rescan_ctlr_wq = NULL;
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}
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kfree(h);
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return rc;
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}
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@ -7621,7 +7652,7 @@ static void hpsa_shutdown(struct pci_dev *pdev)
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*/
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hpsa_flush_cache(h);
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h->access.set_intr_mask(h, HPSA_INTR_OFF);
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hpsa_free_irqs(h);
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hpsa_free_irqs(h); /* init_one 4 */
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hpsa_disable_interrupt_mode(h); /* pci_init 2 */
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}
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@ -7629,8 +7660,10 @@ static void hpsa_free_device_info(struct ctlr_info *h)
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{
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int i;
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for (i = 0; i < h->ndevices; i++)
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for (i = 0; i < h->ndevices; i++) {
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kfree(h->dev[i]);
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h->dev[i] = NULL;
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}
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}
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static void hpsa_remove_one(struct pci_dev *pdev)
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@ -7652,26 +7685,29 @@ static void hpsa_remove_one(struct pci_dev *pdev)
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cancel_delayed_work_sync(&h->rescan_ctlr_work);
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destroy_workqueue(h->rescan_ctlr_wq);
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destroy_workqueue(h->resubmit_wq);
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hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
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/* includes hpsa_free_irqs */
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/* includes hpsa_free_irqs - init_one 4 */
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/* includes hpsa_disable_interrupt_mode - pci_init 2 */
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hpsa_shutdown(pdev);
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hpsa_free_device_info(h);
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hpsa_free_sg_chain_blocks(h);
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kfree(h->blockFetchTable); /* perf 2 */
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hpsa_free_reply_queues(h); /* perf 1 */
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hpsa_free_ioaccel1_cmd_and_bft(h); /* perf 1 */
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hpsa_free_ioaccel2_cmd_and_bft(h); /* perf 1 */
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hpsa_free_cmd_pool(h); /* init_one 5 */
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kfree(h->hba_inquiry_data);
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hpsa_free_device_info(h); /* scan */
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hpsa_unregister_scsi(h); /* init_one "8" */
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kfree(h->hba_inquiry_data); /* init_one "8" */
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h->hba_inquiry_data = NULL; /* init_one "8" */
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hpsa_free_performant_mode(h); /* init_one 7 */
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hpsa_free_sg_chain_blocks(h); /* init_one 6 */
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hpsa_free_cmd_pool(h); /* init_one 5 */
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/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
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/* includes hpsa_disable_interrupt_mode - pci_init 2 */
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hpsa_free_pci_init(h);
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hpsa_free_pci_init(h); /* init_one 3 */
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free_percpu(h->lockup_detected);
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kfree(h);
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free_percpu(h->lockup_detected); /* init_one 2 */
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h->lockup_detected = NULL; /* init_one 2 */
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/* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
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kfree(h); /* init_one 1 */
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}
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|
||||
static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
|
||||
|
@ -7729,7 +7765,10 @@ static void calc_bucket_map(int bucket[], int num_buckets,
|
|||
}
|
||||
}
|
||||
|
||||
/* return -ENODEV or other reason on error, 0 on success */
|
||||
/*
|
||||
* return -ENODEV on err, 0 on success (or no action)
|
||||
* allocates numerous items that must be freed later
|
||||
*/
|
||||
static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
|
||||
{
|
||||
int i;
|
||||
|
@ -7914,12 +7953,16 @@ static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
|
|||
/* Free ioaccel1 mode command blocks and block fetch table */
|
||||
static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
|
||||
{
|
||||
if (h->ioaccel_cmd_pool)
|
||||
if (h->ioaccel_cmd_pool) {
|
||||
pci_free_consistent(h->pdev,
|
||||
h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
|
||||
h->ioaccel_cmd_pool,
|
||||
h->ioaccel_cmd_pool_dhandle);
|
||||
h->ioaccel_cmd_pool = NULL;
|
||||
h->ioaccel_cmd_pool_dhandle = 0;
|
||||
}
|
||||
kfree(h->ioaccel1_blockFetchTable);
|
||||
h->ioaccel1_blockFetchTable = NULL;
|
||||
}
|
||||
|
||||
/* Allocate ioaccel1 mode command blocks and block fetch table */
|
||||
|
@ -7963,12 +8006,16 @@ static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
|
|||
{
|
||||
hpsa_free_ioaccel2_sg_chain_blocks(h);
|
||||
|
||||
if (h->ioaccel2_cmd_pool)
|
||||
if (h->ioaccel2_cmd_pool) {
|
||||
pci_free_consistent(h->pdev,
|
||||
h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
|
||||
h->ioaccel2_cmd_pool,
|
||||
h->ioaccel2_cmd_pool_dhandle);
|
||||
h->ioaccel2_cmd_pool = NULL;
|
||||
h->ioaccel2_cmd_pool_dhandle = 0;
|
||||
}
|
||||
kfree(h->ioaccel2_blockFetchTable);
|
||||
h->ioaccel2_blockFetchTable = NULL;
|
||||
}
|
||||
|
||||
/* Allocate ioaccel2 mode command blocks and block fetch table */
|
||||
|
@ -8013,33 +8060,46 @@ static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
|
|||
return rc;
|
||||
}
|
||||
|
||||
static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
|
||||
/* Free items allocated by hpsa_put_ctlr_into_performant_mode */
|
||||
static void hpsa_free_performant_mode(struct ctlr_info *h)
|
||||
{
|
||||
kfree(h->blockFetchTable);
|
||||
h->blockFetchTable = NULL;
|
||||
hpsa_free_reply_queues(h);
|
||||
hpsa_free_ioaccel1_cmd_and_bft(h);
|
||||
hpsa_free_ioaccel2_cmd_and_bft(h);
|
||||
}
|
||||
|
||||
/* return -ENODEV on error, 0 on success (or no action)
|
||||
* allocates numerous items that must be freed later
|
||||
*/
|
||||
static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
|
||||
{
|
||||
u32 trans_support;
|
||||
unsigned long transMethod = CFGTBL_Trans_Performant |
|
||||
CFGTBL_Trans_use_short_tags;
|
||||
int i;
|
||||
int i, rc;
|
||||
|
||||
if (hpsa_simple_mode)
|
||||
return;
|
||||
return 0;
|
||||
|
||||
trans_support = readl(&(h->cfgtable->TransportSupport));
|
||||
if (!(trans_support & PERFORMANT_MODE))
|
||||
return;
|
||||
return 0;
|
||||
|
||||
/* Check for I/O accelerator mode support */
|
||||
if (trans_support & CFGTBL_Trans_io_accel1) {
|
||||
transMethod |= CFGTBL_Trans_io_accel1 |
|
||||
CFGTBL_Trans_enable_directed_msix;
|
||||
if (hpsa_alloc_ioaccel1_cmd_and_bft(h))
|
||||
goto clean_up;
|
||||
} else {
|
||||
if (trans_support & CFGTBL_Trans_io_accel2) {
|
||||
transMethod |= CFGTBL_Trans_io_accel2 |
|
||||
rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
|
||||
if (rc)
|
||||
return rc;
|
||||
} else if (trans_support & CFGTBL_Trans_io_accel2) {
|
||||
transMethod |= CFGTBL_Trans_io_accel2 |
|
||||
CFGTBL_Trans_enable_directed_msix;
|
||||
if (hpsa_alloc_ioaccel2_cmd_and_bft(h))
|
||||
goto clean_up;
|
||||
}
|
||||
rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
|
||||
if (rc)
|
||||
return rc;
|
||||
}
|
||||
|
||||
h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
|
||||
|
@ -8051,8 +8111,10 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
|
|||
h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
|
||||
h->reply_queue_size,
|
||||
&(h->reply_queue[i].busaddr));
|
||||
if (!h->reply_queue[i].head)
|
||||
goto clean_up;
|
||||
if (!h->reply_queue[i].head) {
|
||||
rc = -ENOMEM;
|
||||
goto clean1; /* rq, ioaccel */
|
||||
}
|
||||
h->reply_queue[i].size = h->max_commands;
|
||||
h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
|
||||
h->reply_queue[i].current_entry = 0;
|
||||
|
@ -8061,15 +8123,24 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
|
|||
/* Need a block fetch table for performant mode */
|
||||
h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
|
||||
sizeof(u32)), GFP_KERNEL);
|
||||
if (!h->blockFetchTable)
|
||||
goto clean_up;
|
||||
if (!h->blockFetchTable) {
|
||||
rc = -ENOMEM;
|
||||
goto clean1; /* rq, ioaccel */
|
||||
}
|
||||
|
||||
hpsa_enter_performant_mode(h, trans_support);
|
||||
return;
|
||||
rc = hpsa_enter_performant_mode(h, trans_support);
|
||||
if (rc)
|
||||
goto clean2; /* bft, rq, ioaccel */
|
||||
return 0;
|
||||
|
||||
clean_up:
|
||||
hpsa_free_reply_queues(h);
|
||||
clean2: /* bft, rq, ioaccel */
|
||||
kfree(h->blockFetchTable);
|
||||
h->blockFetchTable = NULL;
|
||||
clean1: /* rq, ioaccel */
|
||||
hpsa_free_reply_queues(h);
|
||||
hpsa_free_ioaccel1_cmd_and_bft(h);
|
||||
hpsa_free_ioaccel2_cmd_and_bft(h);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int is_accelerated_cmd(struct CommandList *c)
|
||||
|
|
Loading…
Reference in New Issue