mirror of https://gitee.com/openkylin/linux.git
[SCSI] qla2xxx: Code cleanup to remove unwanted comments and code.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com> Signed-off-by: Lalit Chandivade <lalit.chandivade@qlogic.com> Signed-off-by: Madhuranath Iyengar <Madhu.Iyengar@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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@ -1253,25 +1253,6 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha)
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return 0;
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}
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static int
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qla82xx_check_for_bad_spd(struct qla_hw_data *ha)
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{
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u32 val = 0;
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val = qla82xx_rd_32(ha, BOOT_LOADER_DIMM_STATUS);
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val &= QLA82XX_BOOT_LOADER_MN_ISSUE;
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if (val & QLA82XX_PEG_TUNE_MN_SPD_ZEROED) {
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qla_printk(KERN_INFO, ha,
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"Memory DIMM SPD not programmed. "
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" Assumed valid.\n");
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return 1;
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} else if (val) {
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qla_printk(KERN_INFO, ha,
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"Memory DIMM type incorrect.Info:%08X.\n", val);
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return 2;
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}
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return 0;
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}
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static int
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qla82xx_pci_mem_write_2M(struct qla_hw_data *ha,
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u64 off, void *data, int size)
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@ -1337,11 +1318,6 @@ qla82xx_pci_mem_write_2M(struct qla_hw_data *ha,
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word[startword+1] |= tmpw >> (sz[0] * 8);
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}
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/*
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* don't lock here - write_wx gets the lock if each time
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* write_lock_irqsave(&adapter->adapter_lock, flags);
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* netxen_nic_pci_change_crbwindow_128M(adapter, 0);
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*/
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for (i = 0; i < loop; i++) {
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temp = off8 + (i << shift_amount);
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qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);
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@ -1443,12 +1419,6 @@ qla82xx_pci_mem_read_2M(struct qla_hw_data *ha,
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off0[1] = 0;
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sz[1] = size - sz[0];
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/*
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* don't lock here - write_wx gets the lock if each time
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* write_lock_irqsave(&adapter->adapter_lock, flags);
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* netxen_nic_pci_change_crbwindow_128M(adapter, 0);
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*/
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for (i = 0; i < loop; i++) {
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temp = off8 + (i << shift_amount);
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qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);
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@ -1481,11 +1451,6 @@ qla82xx_pci_mem_read_2M(struct qla_hw_data *ha,
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}
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}
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/*
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* netxen_nic_pci_change_crbwindow_128M(adapter, 1);
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* write_unlock_irqrestore(&adapter->adapter_lock, flags);
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*/
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if (j >= MAX_CTL_CHECK)
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return -1;
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@ -1916,7 +1881,6 @@ qla82xx_check_cmdpeg_state(struct qla_hw_data *ha)
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qla_printk(KERN_INFO, ha,
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"Cmd Peg initialization failed: 0x%x.\n", val);
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qla82xx_check_for_bad_spd(ha);
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val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_PEGTUNE_DONE);
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read_lock(&ha->hw_lock);
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qla82xx_wr_32(ha, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
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@ -523,8 +523,6 @@
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# define QLA82XX_CAM_RAM_BASE (QLA82XX_CRB_CAM + 0x02000)
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# define QLA82XX_CAM_RAM(reg) (QLA82XX_CAM_RAM_BASE + (reg))
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#define QLA82XX_PEG_TUNE_MN_SPD_ZEROED 0x80000000
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#define QLA82XX_BOOT_LOADER_MN_ISSUE 0xff00ffff
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#define QLA82XX_PORT_MODE_ADDR (QLA82XX_CAM_RAM(0x24))
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#define QLA82XX_PEG_HALT_STATUS1 (QLA82XX_CAM_RAM(0xa8))
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#define QLA82XX_PEG_HALT_STATUS2 (QLA82XX_CAM_RAM(0xac))
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