mirror of https://gitee.com/openkylin/linux.git
sparc: io: implement dummy relaxed accessor macros for writes
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to sparc, in the same vein as the dummy definitions for the relaxed read accessors. The existing relaxed read{b,w,l} accessors are moved into asm/io.h, since they are identical between 32-bit and 64-bit machines. Acked-by: "David S. Miller" <davem@davemloft.net> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -10,6 +10,15 @@
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* Defines used for both SPARC32 and SPARC64
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*/
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/* Relaxed accessors for MMIO */
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#define readb_relaxed(__addr) readb(__addr)
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#define readw_relaxed(__addr) readw(__addr)
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#define readl_relaxed(__addr) readl(__addr)
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#define writeb_relaxed(__b, __addr) writeb(__b, __addr)
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#define writew_relaxed(__w, __addr) writew(__w, __addr)
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#define writel_relaxed(__l, __addr) writel(__l, __addr)
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/* Big endian versions of memory read/write routines */
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#define readb_be(__addr) __raw_readb(__addr)
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#define readw_be(__addr) __raw_readw(__addr)
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@ -4,10 +4,6 @@
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#include <linux/kernel.h>
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#include <linux/ioport.h> /* struct resource */
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#define readb_relaxed(__addr) readb(__addr)
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#define readw_relaxed(__addr) readw(__addr)
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#define readl_relaxed(__addr) readl(__addr)
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#define IO_SPACE_LIMIT 0xffffffff
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#define memset_io(d,c,sz) _memset_io(d,c,sz)
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@ -136,6 +136,7 @@ static inline u32 readl(const volatile void __iomem *addr)
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}
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#define readq readq
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#define readq_relaxed readq
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static inline u64 readq(const volatile void __iomem *addr)
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{ u64 ret;
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@ -175,6 +176,7 @@ static inline void writel(u32 l, volatile void __iomem *addr)
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}
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#define writeq writeq
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#define writeq_relaxed writeq
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static inline void writeq(u64 q, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
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@ -183,7 +185,6 @@ static inline void writeq(u64 q, volatile void __iomem *addr)
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: "memory");
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}
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#define inb inb
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static inline u8 inb(unsigned long addr)
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{
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@ -264,11 +265,6 @@ static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned l
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outsl((unsigned long __force)port, buf, count);
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}
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#define readb_relaxed(__addr) readb(__addr)
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#define readw_relaxed(__addr) readw(__addr)
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#define readl_relaxed(__addr) readl(__addr)
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#define readq_relaxed(__addr) readq(__addr)
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/* Valid I/O Space regions are anywhere, because each PCI bus supported
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* can live in an arbitrary area of the physical address range.
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*/
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