mirror of https://gitee.com/openkylin/linux.git
drm/i915/color: switch to kernel types
Mixed C99 and kernel types use is getting ugly. Prefer kernel types. sed -i 's/\buint\(8\|16\|32\|64\)_t\b/u\1/g' Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190118120125.15484-2-jani.nikula@intel.com
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@ -142,7 +142,7 @@ static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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int i, pipe = crtc->pipe;
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uint16_t coeffs[9] = { 0, };
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u16 coeffs[9] = { 0, };
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bool limited_color_range = false;
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/*
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@ -171,7 +171,7 @@ static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
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* hardware.
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*/
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for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
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uint64_t abs_coeff = ((1ULL << 63) - 1) & input[i];
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u64 abs_coeff = ((1ULL << 63) - 1) & input[i];
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/*
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* Clamp input value to min/max supported by
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@ -233,7 +233,7 @@ static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
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I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), 0);
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if (INTEL_GEN(dev_priv) > 6) {
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uint16_t postoff = 0;
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u16 postoff = 0;
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if (limited_color_range)
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postoff = (16 * (1 << 12) / 255) & 0x1fff;
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@ -244,7 +244,7 @@ static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
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I915_WRITE(PIPE_CSC_MODE(pipe), 0);
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} else {
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uint32_t mode = CSC_MODE_YUV_TO_RGB;
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u32 mode = CSC_MODE_YUV_TO_RGB;
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if (limited_color_range)
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mode |= CSC_BLACK_SCREEN_OFFSET;
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@ -261,15 +261,15 @@ static void cherryview_load_csc_matrix(struct intel_crtc_state *crtc_state)
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struct drm_device *dev = crtc_state->base.crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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uint32_t mode;
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u32 mode;
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if (crtc_state->base.ctm) {
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struct drm_color_ctm *ctm = crtc_state->base.ctm->data;
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uint16_t coeffs[9] = { 0, };
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u16 coeffs[9] = { 0, };
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int i;
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for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
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uint64_t abs_coeff =
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u64 abs_coeff =
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((1ULL << 63) - 1) & ctm->matrix[i];
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/* Round coefficient. */
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@ -331,7 +331,7 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state,
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if (blob) {
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struct drm_color_lut *lut = blob->data;
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for (i = 0; i < 256; i++) {
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uint32_t word =
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u32 word =
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(drm_color_lut_extract(lut[i].red, 8) << 16) |
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(drm_color_lut_extract(lut[i].green, 8) << 8) |
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drm_color_lut_extract(lut[i].blue, 8);
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@ -343,7 +343,7 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state,
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}
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} else {
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for (i = 0; i < 256; i++) {
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uint32_t word = (i << 16) | (i << 8) | i;
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u32 word = (i << 16) | (i << 8) | i;
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if (HAS_GMCH_DISPLAY(dev_priv))
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I915_WRITE(PALETTE(pipe, i), word);
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@ -388,7 +388,7 @@ static void bdw_load_degamma_lut(struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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uint32_t i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
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u32 i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
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I915_WRITE(PREC_PAL_INDEX(pipe),
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PAL_PREC_SPLIT_MODE | PAL_PREC_AUTO_INCREMENT);
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@ -397,7 +397,7 @@ static void bdw_load_degamma_lut(struct intel_crtc_state *crtc_state)
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struct drm_color_lut *lut = crtc_state->base.degamma_lut->data;
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for (i = 0; i < lut_size; i++) {
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uint32_t word =
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u32 word =
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drm_color_lut_extract(lut[i].red, 10) << 20 |
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drm_color_lut_extract(lut[i].green, 10) << 10 |
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drm_color_lut_extract(lut[i].blue, 10);
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@ -406,7 +406,7 @@ static void bdw_load_degamma_lut(struct intel_crtc_state *crtc_state)
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}
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} else {
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for (i = 0; i < lut_size; i++) {
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uint32_t v = (i * ((1 << 10) - 1)) / (lut_size - 1);
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u32 v = (i * ((1 << 10) - 1)) / (lut_size - 1);
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I915_WRITE(PREC_PAL_DATA(pipe),
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(v << 20) | (v << 10) | v);
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@ -418,7 +418,7 @@ static void bdw_load_gamma_lut(struct intel_crtc_state *crtc_state, u32 offset)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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uint32_t i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
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u32 i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
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WARN_ON(offset & ~PAL_PREC_INDEX_VALUE_MASK);
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@ -431,7 +431,7 @@ static void bdw_load_gamma_lut(struct intel_crtc_state *crtc_state, u32 offset)
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struct drm_color_lut *lut = crtc_state->base.gamma_lut->data;
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for (i = 0; i < lut_size; i++) {
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uint32_t word =
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u32 word =
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(drm_color_lut_extract(lut[i].red, 10) << 20) |
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(drm_color_lut_extract(lut[i].green, 10) << 10) |
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drm_color_lut_extract(lut[i].blue, 10);
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@ -449,7 +449,7 @@ static void bdw_load_gamma_lut(struct intel_crtc_state *crtc_state, u32 offset)
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drm_color_lut_extract(lut[i].blue, 16));
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} else {
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for (i = 0; i < lut_size; i++) {
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uint32_t v = (i * ((1 << 10) - 1)) / (lut_size - 1);
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u32 v = (i * ((1 << 10) - 1)) / (lut_size - 1);
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I915_WRITE(PREC_PAL_DATA(pipe),
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(v << 20) | (v << 10) | v);
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@ -491,8 +491,8 @@ static void glk_load_degamma_lut(struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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const uint32_t lut_size = 33;
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uint32_t i;
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const u32 lut_size = 33;
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u32 i;
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/*
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* When setting the auto-increment bit, the hardware seems to
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@ -507,7 +507,7 @@ static void glk_load_degamma_lut(struct intel_crtc_state *crtc_state)
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* different values per channel, so this just loads a linear table.
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*/
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for (i = 0; i < lut_size; i++) {
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uint32_t v = (i * (1 << 16)) / (lut_size - 1);
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u32 v = (i * (1 << 16)) / (lut_size - 1);
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I915_WRITE(PRE_CSC_GAMC_DATA(pipe), v);
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}
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@ -544,8 +544,8 @@ static void cherryview_load_luts(struct intel_crtc_state *crtc_state)
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc)->pipe;
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struct drm_color_lut *lut;
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uint32_t i, lut_size;
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uint32_t word0, word1;
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u32 i, lut_size;
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u32 word0, word1;
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if (crtc_state_is_legacy_gamma(crtc_state)) {
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/* Turn off degamma/gamma on CGM block. */
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