From 12b5aa61ee1d9425c82e35290ec76db1bc0a0614 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 2 Oct 2015 11:34:34 -0700 Subject: [PATCH] clk: samsung: exynos7: Staticize file scope symbols drivers/clk/samsung/clk-exynos7.c:896:33: warning: symbol 'fixed_rate_clks_fsys0' was not declared. Should it be static? drivers/clk/samsung/clk-exynos7.c:1010:33: warning: symbol 'fixed_rate_clks_fsys1' was not declared. Should it be static? Cc: Sylwester Nawrocki Signed-off-by: Stephen Boyd --- drivers/clk/samsung/clk-exynos7.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index 924215b219da..55f8e2e24ab8 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -893,7 +893,7 @@ PNAME(mout_phyclk_usbdrd300_udrd30_pipe_pclk_user_p) = { "fin_pll", "phyclk_usbdrd300_udrd30_pipe_pclk" }; /* fixed rate clocks used in the FSYS0 block */ -struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = { +static struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = { FRATE(0, "phyclk_usbdrd300_udrd30_phyclock", NULL, CLK_IS_ROOT, 60000000), FRATE(0, "phyclk_usbdrd300_udrd30_pipe_pclk", NULL, @@ -1007,7 +1007,7 @@ PNAME(mout_phyclk_ufs20_rx0_user_p) = { "fin_pll", "phyclk_ufs20_rx0_symbol" }; PNAME(mout_phyclk_ufs20_rx1_user_p) = { "fin_pll", "phyclk_ufs20_rx1_symbol" }; /* fixed rate clocks used in the FSYS1 block */ -struct samsung_fixed_rate_clock fixed_rate_clks_fsys1[] __initdata = { +static struct samsung_fixed_rate_clock fixed_rate_clks_fsys1[] __initdata = { FRATE(PHYCLK_UFS20_TX0_SYMBOL, "phyclk_ufs20_tx0_symbol", NULL, CLK_IS_ROOT, 300000000), FRATE(PHYCLK_UFS20_RX0_SYMBOL, "phyclk_ufs20_rx0_symbol", NULL,