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arm64: dts: uniphier: change cpu-release-address 

At first, 256 byte of the head of DRAM space was reserved for some
reasons.  However, as the progress of development, it turned out
unnecessary, and it was never used in the end.  Move the CPU release
address to leave no space.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Masahiro Yamada 2016-06-14 12:01:42 +09:00 committed by Olof Johansson
parent ed6cca5f9a
commit 1388ea2a8d
1 changed files with 4 additions and 4 deletions
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8
arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
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@ -77,7 +77,7 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0 0x000>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu1: cpu@1 {
@ -85,7 +85,7 @@ cpu1: cpu@1 {
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0 0x001>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu2: cpu@100 {
@ -93,7 +93,7 @@ cpu2: cpu@100 {
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0 0x100>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu3: cpu@101 {
@ -101,7 +101,7 @@ cpu3: cpu@101 {
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0 0x101>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
};