mirror of https://gitee.com/openkylin/linux.git
iwlwifi: move uCode API definitions to iwl-4965-commands.h
Move uCode API definitions to iwl-4965-commands.h Signed-off-by: Ben Cahill <ben.m.cahill@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -335,6 +335,21 @@ enum {
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RXON_DEV_TYPE_SNIFFER = 6,
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};
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#define RXON_RX_CHAIN_DRIVER_FORCE_MSK __constant_cpu_to_le16(0x1<<0)
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#define RXON_RX_CHAIN_VALID_MSK __constant_cpu_to_le16(0x7<<1)
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#define RXON_RX_CHAIN_VALID_POS (1)
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#define RXON_RX_CHAIN_FORCE_SEL_MSK __constant_cpu_to_le16(0x7<<4)
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#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
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#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK __constant_cpu_to_le16(0x7<<7)
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#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
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#define RXON_RX_CHAIN_CNT_MSK __constant_cpu_to_le16(0x3<<10)
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#define RXON_RX_CHAIN_CNT_POS (10)
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#define RXON_RX_CHAIN_MIMO_CNT_MSK __constant_cpu_to_le16(0x3<<12)
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#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
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#define RXON_RX_CHAIN_MIMO_FORCE_MSK __constant_cpu_to_le16(0x1<<14)
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#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
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/* rx_config flags */
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/* band & modulation selection */
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#define RXON_FLG_BAND_24G_MSK __constant_cpu_to_le32(1 << 0)
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@ -358,6 +373,21 @@ enum {
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* (according to ON_AIR deassertion) */
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#define RXON_FLG_TSF2HOST_MSK __constant_cpu_to_le32(1 << 15)
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/* HT flags */
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#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
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#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK __constant_cpu_to_le32(0x1<<22)
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#define RXON_FLG_HT_OPERATING_MODE_POS (23)
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#define RXON_FLG_HT_PROT_MSK __constant_cpu_to_le32(0x1<<23)
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#define RXON_FLG_FAT_PROT_MSK __constant_cpu_to_le32(0x2<<23)
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#define RXON_FLG_CHANNEL_MODE_POS (25)
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#define RXON_FLG_CHANNEL_MODE_MSK __constant_cpu_to_le32(0x3<<25)
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#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK __constant_cpu_to_le32(0x1<<25)
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#define RXON_FLG_CHANNEL_MODE_MIXED_MSK __constant_cpu_to_le32(0x2<<25)
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/* rx_config filter flags */
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/* accept all data frames */
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#define RXON_FILTER_PROMISC_MSK __constant_cpu_to_le32(1 << 0)
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@ -431,6 +461,15 @@ struct iwl4965_tx_power {
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#define POWER_TABLE_NUM_ENTRIES 33
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#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
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#define POWER_TABLE_CCK_ENTRY 32
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union iwl4965_tx_power_dual_stream {
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struct {
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u8 radio_tx_gain[2];
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u8 dsp_predis_atten[2];
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} s;
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u32 dw;
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};
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struct tx_power_dual_stream {
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__le32 dw;
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} __attribute__ ((packed));
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@ -698,45 +698,8 @@ enum {
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#define CALIB_IWL_TX_ATTEN_GR5_FCH 1
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#define CALIB_IWL_TX_ATTEN_GR5_LCH 20
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union iwl4965_tx_power_dual_stream {
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struct {
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u8 radio_tx_gain[2];
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u8 dsp_predis_atten[2];
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} s;
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u32 dw;
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};
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/********************* END TXPOWER *****************************************/
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/* HT flags */
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#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
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#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK __constant_cpu_to_le32(0x1<<22)
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#define RXON_FLG_HT_OPERATING_MODE_POS (23)
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#define RXON_FLG_HT_PROT_MSK __constant_cpu_to_le32(0x1<<23)
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#define RXON_FLG_FAT_PROT_MSK __constant_cpu_to_le32(0x2<<23)
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#define RXON_FLG_CHANNEL_MODE_POS (25)
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#define RXON_FLG_CHANNEL_MODE_MSK __constant_cpu_to_le32(0x3<<25)
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#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK __constant_cpu_to_le32(0x1<<25)
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#define RXON_FLG_CHANNEL_MODE_MIXED_MSK __constant_cpu_to_le32(0x2<<25)
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#define RXON_RX_CHAIN_DRIVER_FORCE_MSK __constant_cpu_to_le16(0x1<<0)
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#define RXON_RX_CHAIN_VALID_MSK __constant_cpu_to_le16(0x7<<1)
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#define RXON_RX_CHAIN_VALID_POS (1)
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#define RXON_RX_CHAIN_FORCE_SEL_MSK __constant_cpu_to_le16(0x7<<4)
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#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
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#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK __constant_cpu_to_le16(0x7<<7)
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#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
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#define RXON_RX_CHAIN_CNT_MSK __constant_cpu_to_le16(0x3<<10)
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#define RXON_RX_CHAIN_CNT_POS (10)
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#define RXON_RX_CHAIN_MIMO_CNT_MSK __constant_cpu_to_le16(0x3<<12)
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#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
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#define RXON_RX_CHAIN_MIMO_FORCE_MSK __constant_cpu_to_le16(0x1<<14)
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#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
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/* Flow Handler Definitions */
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/**********************/
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