mirror of https://gitee.com/openkylin/linux.git
drm/i915: Remove intel_ prefix from encoder variables in intel_ddi.c
In I915 driver, there are many places where variable name for intel_encoder object is given as 'intel_encoder' whereas it would make more sense to call it just 'encoder' when possible. This patch does this cleanup in file intel_ddi.c. PS: There are few functions where both drm_encoder and intel_encoder are present. For such functions, this patch does nothing. Suggested-by: Ander Conselvan De Oliveira <conselvan2@gmail.com> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ander Conselvan De Oliveira <conselvan2@gmail.com> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1489067021-4709-1-git-send-email-shashank.sharma@intel.com
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@ -821,11 +821,11 @@ static struct intel_encoder *
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intel_ddi_get_crtc_encoder(struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->base.dev;
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struct intel_encoder *intel_encoder, *ret = NULL;
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struct intel_encoder *encoder, *ret = NULL;
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int num_encoders = 0;
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for_each_encoder_on_crtc(dev, &crtc->base, intel_encoder) {
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ret = intel_encoder;
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for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
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ret = encoder;
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num_encoders++;
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}
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@ -1130,12 +1130,12 @@ void intel_ddi_clock_get(struct intel_encoder *encoder,
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static bool
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hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
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struct intel_crtc_state *crtc_state,
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struct intel_encoder *intel_encoder)
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struct intel_encoder *encoder)
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{
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struct intel_shared_dpll *pll;
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pll = intel_get_shared_dpll(intel_crtc, crtc_state,
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intel_encoder);
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encoder);
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if (!pll)
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DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
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pipe_name(intel_crtc->pipe));
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@ -1146,11 +1146,11 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
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static bool
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skl_ddi_pll_select(struct intel_crtc *intel_crtc,
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struct intel_crtc_state *crtc_state,
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struct intel_encoder *intel_encoder)
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struct intel_encoder *encoder)
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{
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struct intel_shared_dpll *pll;
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pll = intel_get_shared_dpll(intel_crtc, crtc_state, intel_encoder);
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pll = intel_get_shared_dpll(intel_crtc, crtc_state, encoder);
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if (pll == NULL) {
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DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
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pipe_name(intel_crtc->pipe));
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@ -1163,9 +1163,9 @@ skl_ddi_pll_select(struct intel_crtc *intel_crtc,
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static bool
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bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
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struct intel_crtc_state *crtc_state,
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struct intel_encoder *intel_encoder)
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struct intel_encoder *encoder)
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{
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return !!intel_get_shared_dpll(intel_crtc, crtc_state, intel_encoder);
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return !!intel_get_shared_dpll(intel_crtc, crtc_state, encoder);
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}
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/*
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@ -1179,27 +1179,27 @@ bool intel_ddi_pll_select(struct intel_crtc *intel_crtc,
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struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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struct intel_encoder *intel_encoder =
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struct intel_encoder *encoder =
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intel_ddi_get_crtc_new_encoder(crtc_state);
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if (IS_GEN9_BC(dev_priv))
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return skl_ddi_pll_select(intel_crtc, crtc_state,
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intel_encoder);
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encoder);
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else if (IS_GEN9_LP(dev_priv))
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return bxt_ddi_pll_select(intel_crtc, crtc_state,
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intel_encoder);
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encoder);
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else
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return hsw_ddi_pll_select(intel_crtc, crtc_state,
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intel_encoder);
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encoder);
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}
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void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
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struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc);
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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int type = intel_encoder->type;
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int type = encoder->type;
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uint32_t temp;
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if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP || type == INTEL_OUTPUT_DP_MST) {
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@ -1244,12 +1244,12 @@ void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
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void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
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struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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enum port port = intel_ddi_get_encoder_port(intel_encoder);
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int type = intel_encoder->type;
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enum port port = intel_ddi_get_encoder_port(encoder);
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int type = encoder->type;
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uint32_t temp;
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/* Enable TRANS_DDI_FUNC_CTL for the pipe to work in HDMI mode */
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@ -1321,7 +1321,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
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temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
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} else {
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WARN(1, "Invalid encoder type %d for pipe %c\n",
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intel_encoder->type, pipe_name(pipe));
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encoder->type, pipe_name(pipe));
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}
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I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
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@ -1342,19 +1342,19 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
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{
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struct drm_device *dev = intel_connector->base.dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_encoder *intel_encoder = intel_connector->encoder;
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struct intel_encoder *encoder = intel_connector->encoder;
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int type = intel_connector->base.connector_type;
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enum port port = intel_ddi_get_encoder_port(intel_encoder);
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enum port port = intel_ddi_get_encoder_port(encoder);
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enum pipe pipe = 0;
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enum transcoder cpu_transcoder;
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uint32_t tmp;
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bool ret;
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if (!intel_display_power_get_if_enabled(dev_priv,
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intel_encoder->power_domain))
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encoder->power_domain))
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return false;
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if (!intel_encoder->get_hw_state(intel_encoder, &pipe)) {
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if (!encoder->get_hw_state(encoder, &pipe)) {
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ret = false;
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goto out;
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}
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@ -1393,7 +1393,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
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}
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out:
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intel_display_power_put(dev_priv, intel_encoder->power_domain);
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intel_display_power_put(dev_priv, encoder->power_domain);
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return ret;
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}
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@ -1486,8 +1486,8 @@ void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
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enum port port = intel_ddi_get_encoder_port(intel_encoder);
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struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc);
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enum port port = intel_ddi_get_encoder_port(encoder);
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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if (cpu_transcoder != TRANSCODER_EDP)
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@ -1762,14 +1762,14 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
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crtc_state, conn_state);
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}
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static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder,
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static void intel_ddi_pre_enable(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state)
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{
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int type = intel_encoder->type;
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int type = encoder->type;
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if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
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intel_ddi_pre_enable_dp(intel_encoder,
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intel_ddi_pre_enable_dp(encoder,
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pipe_config->port_clock,
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pipe_config->lane_count,
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pipe_config->shared_dpll,
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@ -1777,7 +1777,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder,
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INTEL_OUTPUT_DP_MST));
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}
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if (type == INTEL_OUTPUT_HDMI) {
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intel_ddi_pre_enable_hdmi(intel_encoder,
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intel_ddi_pre_enable_hdmi(encoder,
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pipe_config->has_hdmi_sink,
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pipe_config, conn_state,
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pipe_config->shared_dpll);
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@ -1836,11 +1836,11 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
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}
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}
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void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
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void intel_ddi_fdi_post_disable(struct intel_encoder *encoder,
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struct intel_crtc_state *old_crtc_state,
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struct drm_connector_state *old_conn_state)
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{
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struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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uint32_t val;
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/*
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val &= ~FDI_RX_ENABLE;
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I915_WRITE(FDI_RX_CTL(PIPE_A), val);
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intel_ddi_post_disable(intel_encoder, old_crtc_state, old_conn_state);
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intel_ddi_post_disable(encoder, old_crtc_state, old_conn_state);
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val = I915_READ(FDI_RX_MISC(PIPE_A));
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val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);
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