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[PATCH] x86_64: Use X86_FEATURE_CONSTANT_TSC now to clean up Intel speedstep drivers 

They previously tried to figure this out on their own.

Suggested by Venkatesh.

Cc: venkatesh.pallipadi@intel.com
Cc: davej@redhat.com
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Andi Kleen 2006-01-11 22:42:48 +01:00 committed by Linus Torvalds
parent 39b3a79105
commit 152bf8c55d
3 changed files with 4 additions and 31 deletions
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5
arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
View File

@ -40,8 +40,6 @@
#include <linux/acpi.h>
#include <acpi/processor.h>
#include "speedstep-est-common.h"
#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
@ -367,6 +365,7 @@ acpi_cpufreq_cpu_init (
unsigned int cpu = policy->cpu;
struct cpufreq_acpi_io *data;
unsigned int result = 0;
struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
union acpi_object arg0 = {ACPI_TYPE_BUFFER};
u32 arg0_buf[3];
@ -390,7 +389,7 @@ acpi_cpufreq_cpu_init (
if (result)
goto err_free;
if (is_const_loops_cpu(cpu)) {
if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
}

5
arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
View File

@ -35,8 +35,6 @@
#include <asm/processor.h>
#include <asm/cpufeature.h>
#include "speedstep-est-common.h"
#define PFX "speedstep-centrino: "
#define MAINTAINER "Jeremy Fitzhardinge <jeremy@goop.org>"
@ -493,12 +491,13 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
unsigned l, h;
int ret;
int i;
struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
/* Only Intel makes Enhanced Speedstep-capable CPUs */
if (cpu->x86_vendor != X86_VENDOR_INTEL || !cpu_has(cpu, X86_FEATURE_EST))
return -ENODEV;
if (is_const_loops_cpu(policy->cpu)) {
if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
centrino_driver.flags |= CPUFREQ_CONST_LOOPS;
}

25
arch/i386/kernel/cpu/cpufreq/speedstep-est-common.h
View File

@ -1,25 +0,0 @@
/*
* Routines common for drivers handling Enhanced Speedstep Technology
* Copyright (C) 2004 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
*
* Licensed under the terms of the GNU GPL License version 2 -- see
* COPYING for details.
*/
static inline int is_const_loops_cpu(unsigned int cpu)
{
struct cpuinfo_x86 *c = cpu_data + cpu;
if (c->x86_vendor != X86_VENDOR_INTEL || !cpu_has(c, X86_FEATURE_EST))
return 0;
/*
* on P-4s, the TSC runs with constant frequency independent of cpu freq
* when we use EST
*/
if (c->x86 == 0xf)
return 1;
return 0;
}