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MIPS: dts: ocelot: describe the load/save GPIO 

This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Quentin Schulz 2020-06-23 16:30:14 +02:00 committed by David S. Miller
parent 3461522d00
commit 15324652f6
1 changed files with 11 additions and 1 deletions
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12
arch/mips/boot/dts/mscc/ocelot_pcb120.dts
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@ -3,6 +3,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/phy/phy-ocelot-serdes.h>
#include "ocelot.dtsi"
@ -25,6 +26,11 @@ phy_int_pins: phy_int_pins {
pins = "GPIO_4";
function = "gpio";
};
phy_load_save_pins: phy_load_save_pins {
pins = "GPIO_10";
function = "ptp2";
};
};
&mdio0 {
@ -34,27 +40,31 @@ &mdio0 {
&mdio1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&miim1>, <&phy_int_pins>;
pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
phy7: ethernet-phy@0 {
reg = <0>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gpio>;
load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
};
phy6: ethernet-phy@1 {
reg = <1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gpio>;
load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
};
phy5: ethernet-phy@2 {
reg = <2>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gpio>;
load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
};
phy4: ethernet-phy@3 {
reg = <3>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gpio>;
load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
};
};